PI7C8152B datasheet(74/90 Pages) PERICOM

74 / 90 page

PI7C8152A & PI7C8152B

2-PORT PCI-TO-PCI BRIDGE

ADVANCE INFORMATION

Page 74 of 90

October 16, 2003 – Revision 1.11

Bit

Function

Type

Description

31:20

Prefetchable

Memory Limit

Address [31:20]

R/W

Defines the top address of an address range for the bridge to

determine when to forward memory read and write transactions from

one interface to the other. The upper 12 bits correspond to address

bits [31:20] and are writable. The lower 20 bits are assumed to be

FFFFFh. The memory limit upper 32 bits register contains the upper

half of the limit address.

12.1.21

PREFETCHABLE MEMORY BASE ADDRESS UPPER 32-BITS

Bit

Function

Type

Description

31:0

Prefetchable

Memory Base

Address, Upper

32-bits [63:32]

R/W

Defines the upper 32-bits of a 64-bit bottom address of an address

range for the bridge to determine when to forward memory read and

write transactions from one interface to the other.

Reset to 0

12.1.22

PREFETCHABLE MEMORY LIMIT ADDRESS UPPER 32-BITS

Bit

Function

Type

Description

31:0

Prefetchable

Memory Limit

Address, Upper

32-bits [63:32]

R/W

Defines the upper 32-bits of a 64-bit top address of an address range

for the bridge to determine when to forward memory read and write

transactions from one interface to the other.

Reset to 0

12.1.23

I/O BASE ADDRESS UPPER 16-BITS REGISTER – OFFSET 30h

Bit

Function

Type

Description

15:0

I/O Base

Address, Upper

16-bits [31:16]

R/W

Defines the upper 16-bits of a 32-bit bottom address of an address

range for the bridge to determine when to forward I/O transactions

from one interface to the other.

Reset to 0

12.1.24

I/O LIMIT ADDRESS UPPER 16-BITS REGISTER – OFFSET 30h

Bit

Function

Type

Description

31:16

I/O Limit

Address, Upper

16-bits [31:16]

R/W

Defines the upper 16-bits of a 32-bit top address of an address range

for the bridge to determine when to forward I/O transactions from

one interface to the other.

Reset to 0

12.1.25

ECP POINTER REGISTER – OFFSET 34h

Bit

Function

Type

Description

7:0

Enhanced

Capabilities Port

Pointer

R/W

Enhanced capabilities port offset pointer. Read as DCh to indicate

that the first item resides at that configuration offset.

PI7C8152B Datasheet(PDF) 74 Page - Pericom Semiconductor Corporation

PI7C8152B Datasheet(HTML) 74 Page - Pericom Semiconductor Corporation

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