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HMX2000 Datasheet(PDF) 2 Page - Honeywell Solid State Electronics Center |
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HMX2000 Datasheet(HTML) 2 Page - Honeywell Solid State Electronics Center |
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2 / 2 page ![]() HMX2000 ________________________________________________________________________ Building blocks 8-bit, 8-channel A/D converter 12-bit current-output DAC Laser-trimmed precision voltage reference General purpose opamp, bias generators PLL, 2 versions, 50 –180 MHz Misc. Amplifiers Comparators Analog Output Buffer SPICE models, Custom Cell Design Services SPECIFICATIONS HMX2000 Characteristics Maximum gate count and I/O 275,000 useable gates and 388 signal I/O Typical delay – 2 input NAND 270 ps @ 5.0V I/O interface levels TTL, CMOS, Schmitt trigger Typical power consumption, W/MHz/gate 0.6 @ 5.0V Operating temperature range -55 C to +125 C Minimum Geometry 0.8 m Drawn/ 0.65 mLeff Analog supply level 5.0V NMOS/PMOS Vt matching NMOS - ~ 1.0 mV (large devices) PMOS - ~ 1.5 mV (large devices) Poly resistor characteristics 250 ppm/ C, 250 A/ m RMS current density, 100 /square 30% P-well resistor characteristics 2500 ppm/ C, 20 A/ m RMS current density, -2000 ppm/V, 2500 /square, 35% Linear capacitor characteristics -100 ppm/V, 0.5 fF/ m2,20 ppm/ C The HMX2000 family has a cold sparing feature to allow a chip level power down mode, in which the associated busses connected to the chip can remain active. This high impedance off-state buffer feature allows users to power down portions of their system for power savings. Honeywell’s VDSTM design kit and SOI libraries provide the necessary guidance to achieve first pass design success. The VDS design kit supports industry leading Electronic Design Automation tools including those offered by Mentor Graphics, Synopsys, and Cadence. Honeywell can perform design translations to the HMX2000 ASIC family from other Computer Aided Design platforms. Customers may use familiar CAD tools and libraries to map existing designs to Honeywell library components. Any analog tools capable of SPICE simulation can be used to design the analog part of the mixed mode design. Honeywell will provide SOI-IV Mixed Signal Design Guidelines to assist users in the design of analog functions. The basic technology parameters such as capacitance, sheet resistance, maximum operating voltage and electromigration limits along with BSIM device models are documented in the SOI-IV Electrical Rules and are available to designers. Honeywell assigns a Customer Design Engineer to each ASIC program to provide technical assistance, telephone support, and to coordinate the design through mask release. A project manager is also assigned to communicate fab, test and package assembly status. The HMX2000 mixed mode ASIC family provides customers with an integration capability that can improve system performance while reducing power and provides system cost savings. To learn more about Honeywell’s variety of custom and semi-custom IC products, call us at 763-954-2888. Honeywell reserves the right to make changes to any products or technology herein to improve reliability, function or design. Honeywell does not assume any liability arising out of the application or use of any product or circuit described herein: neither does it convey any license under its patent rights nor the rights of others. 11/01 900300 01/03 |
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