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IR3628MPBF Datasheet(PDF) 13 Page - International Rectifier |
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IR3628MPBF Datasheet(HTML) 13 Page - International Rectifier |
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13 / 22 page  IR3628MPbF 08/10/2007 Power MOSFET Selection The IR3628 uses two N-Channel MOSFETs per channel. The selection criteria to meet power transfer requirements are based on maximum drain-source voltage (V DSS), gate-source drive voltage (V gs), maximum output current, On- resistance R DS(on), and thermal management. The MOSFET must have a maximum operating voltage (V DSS) exceeding the maximum input voltage (V in). The gate drive requirement is almost the same for both MOSFETs. Logic-level transistor can be used and caution should be taken with devices at very low gate threshold voltage (V gs) to prevent undesired turn-on of the complementary MOSFET, which results a shoot-through current. The total power dissipation for MOSFETs includes conduction and switching losses. For the Buck converter the average inductor current is equal to the DC load current. The conduction loss is defined as: The R DS(on) temperature dependency should be considered for the worst case operation. This is typically given in the MOSFET data sheet. Ensure that the conduction losses and switching losses do not exceed the package ratings or violate the overall thermal budget. For this design, IRF7823 is selected for control FET and IRF7832Z is selected for synchronous FET. These devices provide low on resistance in a cost effective SO8 package. The MOSFETs have the following data: The conduction losses will be: P con=0.45W. The switching loss is more difficult to calculate, even though the switching transition is well understood. The reason is the effect of the parasitic components and switching times during the switching procedures such as turn-on / turn- off delays and rise and fall times. The control MOSFET contributes to the majority of the dependency e temperatur R D) (1 R I switch) (lower P D R I switch) (upper P ds(on) ds(on) 2 load cond ds(on) 2 load cond = ∗ − ∗ ∗ = = ∗ ∗ ∗ = = ϑ ϑ ϑ V V mΩ R nC V,Q V gs ds(on) g ds 10 7 8 14 30 = = = = @ . : (IRF7823) ControlFET switching losses in synchronous Buck converter. The synchronous MOSFET turns on under zero voltage conditions, therefore, the turn on losses for synchronous MOSFET can be neglected. With a linear approximation, the total switching loss can be expressed as: Where: V ds(off) = Drain to source voltage at the off time t r = Rise time t f = Fall time T = Switching period I load = Load current The switching time waveforms is shown in figure18. From IRF7832Z data sheet: tr = 13ns tf = 14ns These values are taken under a certain condition test. For more details please refer to the IRF7832Z data sheet. By using equation (10), we can calculate the switching losses. P sw=0.74W The reverse recovery loss is also another contributing factor in control FET switching losses. This is equivalent to extra current requires to remove the minority charges from synchronous FET. The reverse recovery loss can be expressed as: (10) - - - * * ) ( load f r off ds sw I T t t V P + = 2 VDS VGS 10% 90% td(ON) td(OFF) tr tf Fig. 18: switching time waveforms V V mΩ R nC V,Q V gs ds(on) g ds 10 @ 8 . 3 45 30 : (IRF7832Z) SyncFET = = = = Frequency Switching F Time Recovery Reverse t Charge Recovery verse Q F t Q P s rr rr s rr rr Qrr : : Re : * * = 13 |
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