STM32H562VG datasheet(50/270 Pages) STMICROELECTRONICS

50 / 270 page

Functional overview

STM32H562xx and STM32H563xx

50/270

DS14258 Rev 5

All RTC events (alarm, wake-up timer, timestamp) can generate an interrupt and wake up

the device from the low-power modes.

3.34.2

Tamper and backup registers (TAMP)

The anti-tamper detection circuit is used to protect sensitive data from external attacks.

32 32-bit backup registers are retained in all low-power modes and in VBAT mode. The

backup registers, as well as other secrets in the device, are protected by this anti-tamper

detection circuit with eight tamper pins and nine internal tampers. The external tamper pins

can be configured for edge detection, or level detection with or without filtering, or active

tamper that increases the security level by auto checking that the tamper pins are not

externally opened or shorted.

TAMP main features:

•

A tamper detection can erase the backup registers, backup SRAM, SRAM2, caches

and cryptographic peripherals.

•

32 32-bit backup registers:

–

The backup registers (TAMP_BKPxR) are implemented in the Backup domain that

remains powered-on by VBAT when the VDD power is switched off.

•

Up to 8 tamper pins for 8 external tamper detection events:

–

Active tamper mode: continuous comparison between tamper output and input to

protect from physical open-short attacks

–

Flexible active tamper I/O management: from 4 meshes (each input associated to

its own exclusive output) to 7 meshes (single output shared for up to 7 tamper

inputs)

–

Passive tampers: ultra-low power edge or level detection with internal pull-up

hardware management

–

Configurable digital filter

Note:

As input, only PC13, PI8, PA0, PA1, and PA2 are functional in Standby and VBAT modes.

As output, only PC13 and PA1, and PI8 are functional in Standby and VBAT modes.

•

Internal tamper events to protect against transient or environmental perturbation

attacks

•

Each tamper can be configured in two modes:

–

Hardware mode: immediate erase of secrets on tamper detection, including

backup registers erase

–

Software mode: erase of secrets following a tamper detection launched by

software

•

Any tamper detection can generate an RTC time stamp event.

•

TrustZone support:

–

Tamper secure or nonsecure configuration.

–

Backup registers configuration in three configurable-size areas:

- 1 read/write secure area

- 1 write secure/read nonsecure area

- 1 read/write nonsecure area

–

Secret key, stored in backup registers, protected against read and write access

•

Tamper configuration and backup registers privilege protection

•

Monotonic counter

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