STM32H562VG datasheet(58/270 Pages) STMICROELECTRONICS

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Functional overview

STM32H562xx and STM32H563xx

58/270

DS14258 Rev 5

The SAI peripheral supports:

•

Two independent audio sub-blocks that can be transmitters or receivers with their

respective FIFO

•

8-word integrated FIFOs for each audio sub-block

•

Synchronous or Asynchronous mode between the audio sub-blocks

•

Master or slave configuration independent for both audio sub-blocks

•

Clock generator for each audio block to target independent audio frequency sampling

when both audio sub-blocks are configured in master mode

•

Data size configurable: 8-, 10-, 16-, 20-, 24-, 32-bit

•

Peripheral with large configurability and flexibility, allowing to target the following audio

protocols: I2S, LSB or MSB-justified, PCM/DSP, TDM, AC’97 and SPDIF out

•

Up to 16 slots available with configurable size and with the possibility to select which

ones are active in the audio frame

•

Number of bits by frame may be configurable

•

Frame synchronization active level configurable (offset, bit length, level)

•

First active bit position in the slot is configurable

•

LSB first or MSB first for data transfer

•

Mute mode

•

Stereo/mono audio frame capability

•

Communication clock strobing edge configurable (SCK)

•

Error flags with associated interrupts if enabled respectively

–

Overrun and underrun detection

–

Anticipated frame synchronization signal detection in Slave mode

–

Late frame synchronization signal detection in Slave mode

–

Codec not ready for the AC’97 mode in reception

•

Interruption sources when enabled:

–Errors

–

FIFO requests

•

DMA interface with two dedicated channels to handle access to the dedicated

integrated FIFO of each SAI audio sub-block.

Table 11. SAI implementation

Feature(1)

1. X: supported

SAI1

SAI2

I2S, LSB or MSB-justified, PCM/DSP, TDM, AC’97

Mute mode

Stereo/mono audio frame capability.

16 slots

Data size configurable: 8-, 10-, 16-, 20-, 24-, 32-bit

FIFO size

X (8 words)

SPDIF

PDM

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