STM32H562VG datasheet(223/270 Pages) STMICROELECTRONICS

223 / 270 page

DS14258 Rev 5

223/270

STM32H562xx and STM32H563xx

Electrical characteristics

238

Table 115. SPI characteristics(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fSCK

1/tSCK

SPI clock frequency

Master receiver mode

2.7 V < VDD < 3.6 V

135/3(2)

MHz

Master receiver mode

1.71 V < VDD < 2.7 V

120/3(2)

Master transmitter mode

2.7 V < VDD < 3.6 V

135/3(2)

Master transmitter mode

1.71 V < VDD < 3.6 V

120/3(2)

Slave receiver mode

1.71 V < VDD < 3.6 V

120

Slave transmitter mode

2.7 V < VDD < 3.6 V

43/6(3)

Slave transmitter mode

1.71 V < VDD < 2.7 V

41/6(3)

tsu(NSS)

NSS setup time

Slave mode

3.5

th(NSS)

NSS hold time

Slave mode

4.5

tw(SCKH)

tw(SCKL)

SCK high and low time

Master mode

(tSCK/2) - 1

(tSCK/2)

(tSCK/2) + 1

tsu(MI)

Data input setup time

Master mode

3.5

tsu(SI)

Slave mode

th(MI)

Data input hold time

Master mode

th(SI)

Slave mode

1.5

ta(SO)

Data output access time

Slave mode

6.5

tdis(SO)

Data output disable time

Slave mode

7.5

tv(SO)

Data output valid time

Slave mode,

2.7 V < VDD < 3.6 V

8.5/25(3)

11.5/33(3)

Slave mode,

1.71 V < VDD < 3.6 V

-10/59(3)

12/76(3)

tv(MO)

Master mode

1.5

th(SO)

Data output hold time

Slave mode,

1.71 V < VDD < 3.6 V

6.5/20.5(3)

th(MO)

Master mode

1. Evaluated by characterization - Not tested in production.

2. When using PB13.

3. When using PB14.

STM32H562VG Datasheet(PDF) 223 Page - STMicroelectronics

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