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TMPR4937 Datasheet(PDF) 218 Page - Toshiba Semiconductor |
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TMPR4937 Datasheet(HTML) 218 Page - Toshiba Semiconductor |
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218 / 552 page  Chapter 9 SDRAM Controller 9-2 9.2 Block Diagram Figure 9.2.1 Block Diagram of SDRAMC G-Bus SDRAMC Channel 0 – 7 Control Register Timing Register Command/Load Register Refresh Counter Control Circuit G-Bus Interface Control G-Bus I/F Signal SDCS [3 : 0] * CKE WE* RAS* CAS* DQM [7 : 0] CG SDCLK[3:0] EBIF ECC ADDR [19 : 5] DATA [63 : 0] CB [7 : 0] EBIF Control Signal ECC Control Signal G-Bus I/FSignal ECC Control Signal |
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