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TMPR4937 Datasheet(PDF) 263 Page - Toshiba Semiconductor |
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TMPR4937 Datasheet(HTML) 263 Page - Toshiba Semiconductor |
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263 / 552 page  Chapter 10 PCI Controller 10-5 Registers in the PCI Controller Control Register that include an offset address in the range from 0xD000 to 0xD07F can only be accessed when in the Host mode and cannot be accessed when in the Satellite mode. These registers correspond to PCI Configuration Space Registers that an external PCI Host device accesses when in the Satellite mode. Section “10.4 PCI Controller Control Register” explains each register in detail. Figure 10.3.1 illustrates the register map when in the Host mode. Figure 10.3.2 illustrates the register map when in the Satellite mode. Figure 10.3.1 Register Map in the Host Mode Figure 10.3.2 Register Map in the Satellite Mode PCI Controller Control Register PCI Configuration Space Register Reserved G-Bus Address Space PCI Bus Configuration Space 0xDFFF 0xD270 0xD000 0x00 0x80 0xFF Reserved 0xD080 PCI Controller Control Register Reserved Reserved G-Bus Address Space PCI Bus Configuration Space 0xDFFF 0xD270 0xD000 0x00 0x80 0xFF |
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