| Electronic Components Datasheet Search |
|
UPSD3422 Datasheet(PDF) 152 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
UPSD3422 Datasheet(HTML) 152 Page - STMicroelectronics |
|
152 / 293 page ![]() USB interface uPSD34xx 152/293 Figure 55. FIFO pairing example (1/2 IN paired and 3/4 OUT paired) 25.3.4 Reading and writing FIFOs There are a total of ten 64-byte FIFOs. Each of the five Endpoints has two FIFOs, one IN FIFO for IN transactions and one OUT FIFO for OUT transactions. The FIFOs are accessible by the CPU through a 64-byte segment in the XDATA space when the VISIBLE Bit is set (see Table 80 on page 163). If the VISIBLE Bit is not set, the FIFOs are not accessible by the CPU but are still accessible by the SIE. The base address of the 64-byte segment is specified by the USB Base Address High Register (see Table 85 on page 168) and the USB Base Address Low Register (see Table 86 on page 168). When the VISIBLE Bit is set, the FIFO that is accessible in the 64-byte XDATA space segment is the FIFO selected by the USEL register. The USEL register contains two fields used for selecting the accessible FIFO. The EP field determines the Endpoint selected and the DIR Bit selects the IN or OUT FIFO associated with the Endpoint. 25.3.5 Accessing FIFO control registers, UCON, and USIZE Each of the 10 Endpoint FIFOs has an associated USB Endpoint Control Register (UCON, 0F1H) and a USB FIFO Valid Size Register (USIZE, 0F2H). The USB Endpoint Select Register (USEL) is not only used to select the Endpoint FIFO that is accessible in the XDATA space, but also selects the associated Endpoint’s UCON and USIZE registers that are accessible at SFR addresses 0F1H and 0F2H. 25.3.6 Accessing the setup command buffer Setup Packets are sent from the host to a device’s Endpoint0 and consist of 8 bytes of command data. When the SIE receives a Setup packet from the host, it stores the 8 bytes of data in the Command Buffer. The command buffer is accessed via the indexed USB Setup 8032 MCU USB SFRs Serial Interface Engine CTRL XDATA S F R B u s AI10494 Endpoint4 IN FIFO Endpoint3 IN FIFO Endpoint2 IN FIFO P a i r e d P a i r e d Endpoint1 IN FIFO Endpoint0 IN FIFO Endpoint0 OUT FIFO Endpoint1 OUT FIFO Endpoint2 OUT FIFO FIFO Interface Logic Endpoint4 Endpoint3 Endpoint2 (not available) Endpoint2 (not available) Endpoint1 Endpoint0 Endpoint4 Endpoint3 Endpoint1 Endpoint0 Endpoint0 Endpoint1 Endpoint2 Endpoint3 Endpoint0 Endpoint1 Endpoint2 Endpoint3 Endpoint4 (not available) Endpoint4 (not available) Endpoint3 OUT FIFO P a i r e d P a i r e d Endpoint4 OUT FIFO |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |