RE46C191 datasheet(21/44 Pages) MICROCHIP

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DS20005225H-page 21

RE46C191

4.3

Smoke Calibration

A separate Calibration mode is entered for each

Measurement mode (Normal, Hysteresis, Hush and

Chamber Test), so that independent limits can be set

for each. In all Calibration modes, the integrator output

can be accessed at the GLED output.

The Gamp output voltage, which represents the smoke

detection level, can be accessed at the RLED output.

The SmkComp output voltage is the result of the

comparison of Gamp with the integrator output and can

be accessed at HB. The FEED input can be clocked to

step up the smoke detection level at RLED. Once the

desired smoke threshold is reached, the TEST input is

pulsed low-to-high to store the result.

The procedure is described in the following steps:

Power up with the bias conditions shown in

Figure 4-1.

Drive TEST2 input from VSS to VDD to enter

Programming mode. TEST2 remains at VDD

through Step 8 described below.

Apply three clock pulses to the TEST input to

enter T3 mode. This initiates the Calibration

mode for normal limits setting. The integrator

output appears at GLED and the smoke detec-

tion level at RLED.

At this point, clock FEED to increase the smoke

detection level as needed. Pulling IO high with

FEED at a high logic level initiates an

integration. The integrator output signal appears

at GLED. The sequence of incrementing the

limit, performing an integration and monitoring

the HB output for the resulting comparison, can

be repeated until the desired threshold is

reached. Once the desired smoke threshold is

reached, with FEED held low, the IO input must

be pulsed low-to-high to latch the smoke

detection level.

Apply a fourth clock pulse to the TEST input to

enter T4 mode. This initiates the Calibration

mode for hysteresis limits. The sequence in

Step 4 must be repeated to set the hysteresis

limit.

Apply a clock pulse to the TEST input again to

enter T5 mode and initiate calibration for hush

limits. Repeat Step 4 to set the hush limit.

Apply clock pulse to the TEST input a sixth time

to enter T6 mode and initiate calibration for

chamber test limits. Repeat Step 4 to set the

chamber test limit.

After pulsing the IO input to latch the chamber

test limit, the IO must be pulsed low-to-high a

second time to store the limits in memory.

FIGURE 4-4:

Timing Diagram for Modes T3 to T6 Limits Setting.

GLED

IRED

RLED

TEST

FEED

TEST2

Mode T3

– T6 – Limits Setting

VSS

VBST

VSS

VBST

VSS

VBST

VDD

VSS

VBST

VSS

VDD

Min Tsetup2 = 2 µs

Min PW3 = 100 µs

Min Td2 = 10 µs

Min PW1 = 10 µs

Min T1 = 20 µs

Min PW4 = 2 ms

Min PW2 = 10 ms

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