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AX88190AL Datasheet(PDF) 10 Page - ASIX Electronics Corporation |
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AX88190AL Datasheet(HTML) 10 Page - ASIX Electronics Corporation |
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10 / 49 page ![]() AX88190A PCMCIA Fast Ethernet MAC Controller ASIX ELECTRONICS CORPORATION 10 GPIO3# I/O 41 Default “1”. The pin reflects register offset 1Ah bit 3 inverted value. GPIO2 I/O 42 Default “0”. The pin reflects register offset 1Ah bit 2 value. GPIO1# I/O 43 Default “1”. The pin reflects register offset 1Ah bit 1 inverted value. GPIO0# I/O 45 Default “1”. The pin reflects register offset 1Ah bit 0 inverted value. Tab - 6 General Pursose I/O pins group 2.7 Miscellaneous pins group SIGNAL TYPE PIN NO. DESCRIPTION LCLK/XTALIN I 103 CMOS Local Clock : Typical a 25Mhz clock, +/- 100 ppm, 40%-60% duty cycle. ( See application note also ) Crystal Oscillator Input : Typical a 25Mhz crystal, +/- 25 ppm can be connected across XTALIN and XTALOUT. XTALOUT O 104 Crystal Oscillator Output : Typical a 25Mhz crystal, +/- 25 ppm can be connected across XTALIN and XTALOUT. If a single-ended external clock (LCLK) is connected to XTALIN, the crystal output pin should be left floating. CLKO O 101 Clock Output : This clock is source from LCLK/XTALIN. CLK_DIV3# I/PU 67 Clock Devide 3 Enable : Active low to enable the devided 3 circuit. That internally devides LCLK/XTALIN input frequeny by 3 and then feed into internal circuit for system clock used. Default value set to logic high, this function is disabled. PPWDN O 114 Phy Power Down : This pin connects to PHY chip power down mode control input. RESET I/PD 127 Reset Reset is active high then place AX88190A into reset mode immediately. During Falling edge the AX88190A loads the EEPROM data. TEST# I/PU 77 Test Pin : Active LOW The pin is just for test mode setting purpose only. Must be pull high when normal operation. EEPROM SIZE I/PU 73 EEPROM SIZE = 0 : 93C46 128 byte type EEPROM is used. EEPROM SIZE = 1 : 93C56 256 byte type EEPROM is used. NC N/A 46–48, 50– 53, 55-56, No Connection : for manufacturing test only. LVDD P 44, 54, 100, 110, 126, 128 Power Supply : +3.3V DC. HVDD P 19, 29, 64, 75 Power Supply : +5V DC. Note : for pure 3.3V single power solution, all the HVDD pin can connect to +3.3V. Care should be taken that HVDD input power must be greater or equal ( > = ) than LVDD. VSS P 11, 24, 34, 39, 40, 49, 59, 69, 81, 93, 102, 105, 119 Power Supply : +0V DC or Ground Power. Tab - 7 Miscellaneous pins group |
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