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MSC8126VT8000 Datasheet(PDF) 32 Page - Freescale Semiconductor, Inc

Part # MSC8126VT8000
Description  Quad Digital Signal Processor
PDF  48 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MSC8126VT8000 Datasheet(HTML) 32 Page - Freescale Semiconductor, Inc

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MSC8126 Quad Digital Signal Processor Data Sheet, Rev. 13
Electrical Characteristics
Freescale Semiconductor
32
2.5.7
TDM Timing
Table 21. TDM Timing
No.
Characteristic
Expression
Ref = CLKIN
Units
Min
Max
300
TDMxRCLK/TDMxTCLK
TC1
16
—
ns
301
TDMxRCLK/TDMxTCLK high pulse width
(0.5
± 0.1) × TC
7
—
ns
302
TDMxRCLK/TDMxTCLK low pulse width
(0.5
± 0.1) × TC
7
—
ns
303
TDM receive all input set-up time
1.3
—
ns
304
TDM receive all input hold time
1.0
—
ns
305
TDMxTCLK high to TDMxTDAT/TDMxRCLK output active2,3
2.8
—
ns
306
TDMxTCLK high to TDMxTDAT/TDMxRCLK output valid2,3
—8.8
ns
307
All output hold time5
2.5
—
ns
308
TDMxTCLK high to TDmXTDAT/TDMxRCLK output high impedance2,3
—
10.5
ns
309
TDMxTCLK high to TDMXTSYN output valid2
—8.5
ns
310
TDMxTSYN output hold time5
2.5
—
ns
Notes:
1.
Values are based on a a maximum frequency of 62.5 MHz. The TDM interface supports any frequency below 62.5 MHz.
2.
Values are based on 20 pF capacitive load.
3.
When configured as an output, TDMxRCLK acts as a second data link. See the MSC8126 Reference Manual for details.
4.
CLKOUT synchronization is not supported for cores operating at above 400 MHz.
5.
Values are based on 10 pF capacitive load.
Figure 18. TDM Inputs Signals
Figure 19. TDM Output Signals
TDMxRCLK
TDMxRDAT
TDMxRSYN
300
301
302
303
303
304
304
TDMxTCLK
TDMxTDAT
TDMxTSYN
305
306
308
307
300
301
302
310
309
TDMxRCLK



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