50:

50:

0.1 PF

1.0 PF

1.0 PF

Differential

Input

LMH0202

SDI2

SDI2

SDI1

SDI1

25:

25:

25:

25:

LMH0202

SNLS212C – FEBRUARY 2006 – REVISED APRIL 2013

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DVB-ASI APPLICATIONS

The dual differential inputs of the LMH0202 may be externally routed to a single differential input as shown in

Figure 3. This provides a solution for DVB-ASI applications where two non-inverted outputs are needed.

Figure 3. Single Differential Input for DVB-ASI

OUTPUT INTERFACING

The LMH0202 uses current mode outputs. Single-ended output levels are 800 mVP-P into 75Ω AC-coupled

coaxial cable (with RREF = 750Ω). Output level is controlled by the value of the resistor connected between the

RREF pin and VCC.

The RREF resistor should be placed as close as possible to the RREF pin. In addition, the copper in the plane

layers below the RREF network should be removed to minimize parasitic capacitance.

OUTPUT SLEW RATE CONTROL

The LMH0202 output rise and fall times are selectable for either SMPTE 259M or SMPTE 292M compliance via

the SD/HD pin. For slower rise and fall times, or SMPTE 259M compliance, SD/HD is set high. For faster rise

and fall times, or SMPTE 292M compliance, SD/HD is set low.

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