VPP-RMS =

VPP-C

2 + V

PP-ESR

2

V

PP-C

=

f x 8 x C

IPP

LP3923

SNVS567B – APRIL 2010 – REVISED MAY 2013

www.ti.com

The output filter capacitor smooths out current flow from the inductor to the load, helps maintain a steady output

voltage during transient load changes and reduces output voltage ripple. These capacitors must be selected with

sufficient capacitance and sufficiently low ESR to perform these functions.

The output voltage ripple is caused by the charging and discharging of the output capacitor and also due to its

ESR. It can be calculated as:

Voltage peak to peak ripple due to capacitance =

(7)

Voltage peak to peak ripple due to ESR =

VPP-ESR = IPP*RESR

(8)

Voltage peak to peak ripple, root mean squared =

(9)

Note that the output ripple is dependent on the inductor current ripple and the equivalent series resistance of the

output capacitor (RESR). Because these two components are out of phase the rms value is used. The RESR is

frequency dependent (as well as temperature dependent); make sure the frequency of the RESR given is the

same order of magnitude as the switching frequency.

Table 17. Suggested Capacitors And Their Suppliers

Model

Type

Vendor

Voltage Rating

Case Size

10 µF (CIN and COUT)

GRM21BR60J106k

Ceramic, X5R

MURATA

6.3V

0805

JMK212BJ106K

Ceramic, X5R

TAIYO YUDEN

6.3V

0805

C2012X5R0J106K

Ceramic, X5R

TDK

6.3V

0805

LDO Information

OPERATIONAL INFORMATION

The LP3923 has eight LDOs of which 4 are enabled by default and powered up during the power up sequence,

LDOs 1, 2, 3 and 7 are powered up during the power up sequence. LDOs 4, 5, and 6 are separately externally

enabled and will follow LDO3 in start up if their respective enable pin is pulled high. LDO1, LDO2, LDO7 and

LDO8 can be enabled/disabled via the Serial Interface

LDO3 must remain in regulation otherwise the device will power down.

The LILO-type LDO is optimized for low output voltage and for good dynamic performance to supply different fast

charging (digital) pads.

INPUT VOLTAGES

There are two input voltage pins used to power the eight LDOs on the LP3923. VIN1 is the supply for LDO1 and

LDO2. VIN2 is the supply for LDO3, LDO4, LDO5, LDO6, LDO7, and LDO8.

EXTERNAL CAPACITORS

The Low Drop Out Linear Voltage regulators on the LP3923 require external capacitors to ensure stable outputs.

The LDOs on the LP3923 are specifically designed to use small surface mount ceramic capacitors which require

minimum board space. These capacitors must be correctly selected for good performance.

INPUT CAPACITOR

Input capacitors are required for correct operation. It is recommended that a 10 µF capacitor be connected

between each of the voltage input pins and ground (this capacitance value may be increased without limit).

This capacitor must be located a distance of not more than 1 cm from the input pin and returned to a clean

analogue ground. A ceramic capacitor is recommended although a good quality tantalum or film capacitor may

be used at the input.

24

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