PCM1740ESLASH2K datasheet(10/26 Pages) TI2

10 / 26 page

PCM1740

SBAS128B

www.ti.com

LRCK

BCK

DATA

SCKO

Frame Sync

Serial Bit Clock

Serial Data Output

Audio Clock

PCM1740

Audio DSP/Decoder

1/fs

L_ch

R_ch

MSB

LSB

LRCIN (pin 4)

(a) Standard Right - Justified Format

(b) I2S Format

BCKIN (pin 6)

AUDIO DATA WORD = 16-BIT

DIN (pin 5)

MSB

LSB

MSB

LSB

AUDIO DATA WORD = 20-BIT

DIN (pin 5)

MSB

LSB

MSB

LSB

AUDIO DATA WORD = 24-BIT

DIN (pin 5)

MSB

LSB

1/fs

L_ch

R_ch

MSB

LSB

LRCIN (pin 4)

BCKIN (pin 6)

AUDIO DATA WORD = 16-BIT

DIN (pin 5)

MSB

LSB

MSB

LSB

AUDIO DATA WORD = 20-BIT

DIN (pin 5)

MSB

LSB

MSB

LSB

AUDIO DATA WORD = 24-BIT

DIN (pin 5)

MSB

LSB

LRCK and BCK Rates

The LRCK input is operated at the sampling frequency, fS.

The BCK input is operated at 32, 48, or 64 times the

sampling frequency. Both LRCK and BCK must be syn-

chronous with the SCKO output for proper operation.

Data Formats

The PCM1740 supports two audio interface formats: Standard

and I2S. These formats are shown in Figure 9. The audio data

word length for the Left and Right channels may be 16-, 20-,

or 24-bits. The audio data word length and format are pro-

grammed using Control Registers 2 and 3. The reset default

condition is Standard format with 16-bit audio data.

Timing Requirements

Figure 10 shows the audio interface timing requirements.

ZERO FLAG OUTPUT

The PCM1740 includes a zero flag output, ZERO (pin 16).

This is an open-drain output, and a 10k

Ω pull-up resistor

connected to VDD is recommended when using the ZERO

flag as a logic output.

The PCM1740 includes an infinite zero detection function

that monitors the audio data at the DATA input (pin 18). If

the audio data for both the left and right channels is all zeros

for 65,536 continuous BCK clock cycles, the zero flag will

be activated, turning on a MOSFET switch and connecting

the ZERO pin to ground. This provides an active low output

that may be used to control an external mute circuit, or as a

logic indicator for an audio DSP/decoder or microprocessor.

AUDIO SERIAL INTERFACE

The PCM1740 includes a three-wire serial audio interface.

This includes LRCK (pin 19), BCK (pin 17), and DATA

(pin 18). The LRCK input is the audio left/right clock, which

is used as a latch signal for the interface. The BCK input is

used to clock audio data into the serial port. The DATA

input carries multiplexed data for the left and right audio

channels. Audio data must be Two’s Complement, MSB

first formatted. Figure 8 shows the typical connection be-

tween the PCM1740 audio serial interface and an audio DSP

or decoder.

FIGURE 8. Interfacing the PCM1740 to an Audio DSP.

FIGURE 9. Audio Interface Formats.

PCM1740E/2K Datasheet(PDF) 10 Page - Texas Instruments

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