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1/fS

32/fS

Normal Data(1)

Zero Data

Undefined

Data

Normal Data

Synchronous

Asynchronous

Synchronous

Resynchronization

Synchronization Lost

DOUT

State of Synchronization

T0020-02

HPF Bypass Control

APPLICATION INFORMATION

BOARD DESIGN AND LAYOUT CONSIDERATIONS

VCC, VDD PINS

AGND, DGND PINS

VIN PINS

VREF PINS

PCM1801

SBAS131C – OCTOBER 2000 – REVISED JULY 2007

(1)

The transient response (exponentially attenuated signal from

±0.2% dc of FSR with 200-ms time constant) appears

initially.

Figure 27. ADC Digital Output for Loss of Synchronization and Re-Synchronization

The built-in function for dc component rejection can be bypassed by BYPAS (pin 9) control (see Table 4). In

bypass mode, the dc component of the input analog signal, the internal dc offset, etc., are also converted and

output in the digital output data.

Table 4. HPF Bypass Control

BYPAS

HIGH-PASS FILTER (HPF) MODE

Low

Normal (dc cut) mode

High

Bypass (through) mode

The digital and analog power supply lines to the PCM1801 should be bypassed to the corresponding ground

pins with both 0.1-

μF ceramic and 10-μF tantalum capacitors as close to the pins as possible to maximize the

dynamic performance of the ADC. Although the PCM1801 has two power lines to maximize the potential of

dynamic performance, using one common power supply is recommended to avoid unexpected power supply

problems, such as latch-up due to power supply sequencing.

To maximize the dynamic performance of the PCM1801, the analog and digital grounds are not internally

connected. These points should have low impedance to avoid digital noise feedback into the analog ground.

They should be connected directly to each other under the PCM1801 package to reduce potential noise

problems.

A 1.0-

μF tantalum capacitor is recommended as an ac-coupling capacitor, which establishes a 5.3-Hz cutoff

frequency. If a higher full-scale input voltage is required, the input voltage range can be increased by adding a

series resistor to the VIN pins.

To ensure low source impedance, 4.7-

μF tantalum capacitors are recommended from VREF1 to AGND and from

VREF2 to AGND. These capacitors should be located as close as possible to the VREF1 and VREF2 pins to reduce

dynamic errors on the ADC references.

16

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