Data Sheet

ADRF5422

THEORY OF OPERATION

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Rev. 0 | 11 of 13

The ADRF5422 integrates a driver to perform logic function inter-

nally and to provide the advantage of a simplified control interface.

The driver features two digital control input pads (CTRL and EN),

see Table 7. The CTRL pad determines which RF port is in insertion

loss state and which RF port is in isolation state. When the EN pad

is logic high, the switch is in an all-off state regardless of the logic

state of the CTRL pad. Both the RF1 to RFC path and the RF2

to RFC path are in an isolation state. The RF1 and RF2 ports are

terminated to internal 50 Ω resistors, and the RFC port becomes

reflective.

POWER SUPPLY

The ADRF5422 requires a positive supply voltage applied to the

VDD pad and a negative supply voltage applied to the VSS pad.

Bypassing capacitors are recommended on the supply lines to filter

high frequency noise.

The power-up sequence is as follows:

1. Connect GND.

2. Power up the VDD and VSS voltages. Power up VSS after VDD to

avoid current transients on VDD during ramp up.

3. Power up the digital control inputs. The order of the digital

control inputs is not important. However, powering the digital

control inputs before the VDD voltage supply can inadvertently

forward bias and damage the internal ESD structures. To avoid

this damage, use a series 1 kΩ resistor to limit the current

flowing into the control pad. Use pull-up or pull-down resistors if

the controller output is in a high impedance state after the VDD

voltage is powered up and the control pads are not driven to a

valid logic state.

4. Apply RF signal.

The power-down sequence is the reverse order of the power-up

sequence.

Single-Supply Operation

The ADRF5422 can operate with a single positive supply voltage

applied to the VDD, and the VSS pad is connected to ground.

However, some performance differences occur in switching charac-

teristics and large signal. For more details, see Table 2.

RF INPUT AND OUTPUT

All of the RF ports (RFC, RF1, and RF2) are DC-coupled to 0 V,

and no DC blocking is required at the RF ports when the RF line

potential is equal to 0 V.

The RF ports are internally matched to 50 Ω. Therefore, external

matching networks are not required.

The insertion loss path conducts the RF signal between the select-

ed RF throw port and the RF common port. The isolation path

provides high loss between the insertion loss path and the unselect-

ed RF throw port that is terminated to an internal 50 Ω resistor.

The switch design is bidirectional with equal power handling capa-

bilities. The RF input signal can be applied to the RFC port or the

selected RF throw port.

Table 7. Control Voltage Truth Table

Digital Control Inputs

RF Paths

EN

CTRL

RF1 to RFC

RF2 to RFC

Low

Low

Isolation (off)

Insertion loss (on)

Low

High

Insertion loss (on)

Isolation (off)

High

Low

Isolation (off)

Isolation (off)

High

High

Isolation (off)

Isolation (off)