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ZSSC3281BC3R Datasheet(PDF) 32 Page - Renesas Technology Corp

Part # ZSSC3281BC3R
Description  Advanced Dual Channel ARM based Resistive Sensor Signal Conditioner IC
PDF  107 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ZSSC3281BC3R Datasheet(HTML) 32 Page - Renesas Technology Corp

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ZSSC3281 Datasheet
Rev. 1.3 FW Ver. 1.4.0
Mar.13.24 R33DS0020ED0100
Page 32
© 2024 Renesas Electronics
SM+
auxi
SM+
auxi+1
invalid
t → 0
valid
SM+
auxi+1
SM+
auxi+1
max. SSC result latency
max. SSC result latency at AOUT
Figure 23: Measurement Flow and Latency for SM+/AZ Configuration
4.6.5.
Accelerated Bridge Measurements with Sparsely Inserted Auxiliary Measurements
For applications which focus on highest conversion rates at the bridge sensor input but do not require a
deterministic maximum input to output latency of the corrected sensor signal, auxiliary measurements can be
sparsely inserted to occur only after a certain number of measurement sequences were executed by the AFE
sequencer. This way, auxiliary measurements become executed even more seldom, giving the main sensor bridge
measurements priority.
The AFE sequencer can be configured such that an auxi measurement is only executed (inserted) after every Px
measurement sequence. P can be selected as 2, 4, or 8. Figure 24 shows an example of a measurement flow with
P = 2 while Figure 25 uses P = 8 where auxi measurements are executed after eighth measurement cycle.
auxi
S_1
S_8
SM+
SM-
SM+
SM-
SM+
SM-
SM+
SM-
SM+
SM-
SM+
SM-
SM+
SM-
SM+
SM-
Figure 24: Auxiliary Measurement Executed after Every Second Measurement Cycle
auxi
S_1
S_8
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
SM+
Figure 25: Sequencer Setup for Highest Update Rate on Bridge Sensor



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