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AFE7954IALK Datasheet(PDF) 20 Page - Texas Instruments |
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AFE7954IALK Datasheet(HTML) 20 Page - Texas Instruments |
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20 / 31 page ![]() 6.10 Switching Characteristics Typical values at TA = +25°C, full temperature range is TA,MIN = -40°C to TJ,MAX = +110°C; TX Input Rate = 491.52MSPS, fDAC = 8847.36MSPS; fADC = 2949.12MSPS; nominal power supplies; 1 tone at -1 dBFS; DSA Attenuation =0dB; SerDes rate = 24.33Gbps; unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TX Channel Latency SerDes Receiver Analog Delay Full rate 2.8 ns tJESDTX JESD to TX output Latency LMFSHd=2-8-8-1, 368.64 MSPS input rate, 24x Interpolation, Serdes rate = 16.22Gbps (JESD204C) 152 interface clock cycles(1) LMFSHd=8-16-4-1, 491.52 MSPS 24x Interpolation, Serdes rate = 16.22Gbps (JESD204C) 176 LMFSHd=4-16-8-1, 245.76 MSPS 48x Interpolation, Serdes rate = 16.22Gbps (JESD204C) 124 LMFSHd=2-16-16-1, 122.88 MSPS 96x Interpolation, Serdes rate = 16.22Gbps (JESD204C) 97 (1) Interface clock cycles is the period of the digital interface sample rate, e.g. 1GSPS = 1ns. AFE7954 SBASAO7 – JULY 2023 www.ti.com 20 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: AFE7954 |
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