ADC12DL040

SNAS250D – FEBRUARY 2005 – REVISED APRIL 2013

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Typical Performance Characteristics DNL, INL

Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, VA = VD = +3.0V, VDR =

+2.5V, PD = 0V, VREF = +1.0V, fCLK = 40 MHz, fIN = 0, tr = tf = 2 ns, CL = 15 pF/pin, Duty Cycle Stabilizer On, parallel output

mode. Boldface limits apply for TJ = TMIN to TMAX: all other limits TJ = 25°C

DNL

INL

Figure 3.

Figure 4.

DNL vs. fCLK

INL vs. fCLK

Figure 5.

Figure 6.

DNL vs. Clock Duty Cycle

INL vs. Clock Duty Cycle

Figure 7.

Figure 8.

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