AC Timing Diagrams (Continued)

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FIGURE 10. Transmitter Power Down Delay

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FIGURE 11. Receiver Power Down Delay

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C — Setup and Hold Time (Internal data sampling window) defined by RSPOS (receiver input strobe position) min and max

TPPOS — Transmitter output pulse position (min and max)

RSKM

≥ Cable Skew (type, length) + LVDS Source Clock Jitter (cycle to cycle) + ISI (Inter-symbol interference)

j Cable Skew — typically 10 ps to 40 ps per foot, media dependent

j TJCC — Cycle-to-cycle LVDS Output jitter (TJCC) is less than 100 ps (worse case estimate).

j ISI is dependent on interconnect length; may be zero

See Applications Informations section for more details.

FIGURE 12. Receiver Skew Margin

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