VIN

VOUT = 0.9V/2A

CIN

COUT

RFB1

RFB2

L1

D1

Q1

10 PF

100 PF

10 PH

10k

1.27k

Si2343

LM3475

VIN

EN

GND

PGATE

FB

1

2

3

4

5

C2

390 pF

C1

3.9 nF

R1

200k

IRMS_CIN =

VIN

IOUT

VOUT x (VIN - VOUT)

LM3475

SNVS239C – OCTOBER 2004 – REVISED OCTOBER 2015

www.ti.com

Capacitors with high ESL (equivalent series inductance) values should not be used. As shown in Figure 9, the

output ripple voltage contains a small step at both the high and low peaks. This step is caused by and is directly

proportional to the output capacitor’s ESL. A large ESL, such as in an electrolytic capacitor, can create a step

large enough to cause abnormal switching behavior.

8.2.2.6 Input Capacitor Selection

A bypass capacitor is required between VIN and ground. It must be placed near the source of the external PFET.

The input capacitor prevents large voltage transients at the input and provides the instantaneous current when

the PFET turns on. The important parameters for the input capacitor are the voltage rating and the RMS current

rating. Follow the manufacturer’s recommended voltage de-rating. RMS current and power dissipation (PD) can

be calculated with the equations below:

(10)

Figure 12. External Ramp

8.2.2.7 Diode Selection

The catch diode provides the current path to the load during the PFET off time. Therefore, the current rating of

the diode must be higher than the average current through the diode, which be calculated as shown:

ID_AVE = IOUT x (1 − D)

(11)

The peak voltage across the catch diode is approximately equal to the input voltage. Therefore, the diode’s peak

reverse voltage rating should be greater than 1.3 times the input voltage.

A Schottky diode is recommended, since a low forward voltage drop will improve efficiency.

For high temperature applications, diode leakage current may become significant and require a higher reverse

voltage rating to achieve acceptable performance.

8.2.2.8 P-Channel MOSFET Selection

The PFET switch should be selected based on the maximum Drain-Source voltage (VDS), Drain current rating

(ID), maximum Gate-Source voltage (VGS), on resistance (RDSON), and Gate capacitance. The voltage across the

PFET when it is turned off is equal to the sum of the input voltage and the diode forward voltage. The VDS must

be selected to provide some margin beyond the sum of the input voltage and Vd.

Since the current flowing through the PFET is equal to the current through the inductor, ID must be rated higher

than the maximum IPK. During switching, PGATE swings the PFET’s gate from VIN to ground. Therefore, A PFET

must be selected with a maximum VGS larger than VIN. To insure that the PFET turns on completely and quickly,

refer to the PGATE section.

14

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