LMC7660

SNOSBZ9C – APRIL 1997 – REVISED APRIL 2013

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APPLICATION INFORMATION

CIRCUIT DESCRIPTION

The LMC7660 contains four large CMOS switches which are switched in a sequence to provide supply inversion

Vout = −Vin. Energy transfer and storage are provided by two inexpensive electrolytic capacitors. Figure 11 shows

how the LMC7660 can be used to generate

−V+ from V+. When switches S1 and S3 are closed, Cp charges to

the supply voltage V+. During this time interval, switches S2 and S4 are open. After Cp charges to V

+, S1 and S3

are opened, S2 and S4 are then closed. By connecting S2 to ground, Cp develops a voltage −V

+/2 on C

r. After a

number of cycles Cr will be pumped to exactly −V

+. This transfer will be exact assuming no load on C

r, and no

loss in the switches.

In the circuit of Figure 11, S1 is a P-channel device and S2, S3, and S4 are N-channel devices. Because the

output is biased below ground, it is important that the p− wells of S3 and S4 never become forward biased with

respect to either their sources or drains. A substrate logic circuit specifies that these p− wells are always held at

the proper voltage. Under all conditions S4 p− well must be at the lowest potential in the circuit. To switch off S4,

a level translator generates VGS4 = 0V, and this is accomplished by biasing the level translator from the S4 p

−

well.

An internal RC oscillator and ÷ 2 circuit provide timing signals to the level translator. The built-in regulator biases

the oscillator and divider to reduce power dissipation on high supply voltage. The regulator becomes active at

about V+ = 6.5V. Low voltage operation can be improved if the LV pin is shorted to ground for V+

≤ 3.5V. For V+

≥ 3.5V, the LV pin must be left open to prevent damage to the part.

POWER EFFICIENCY AND RIPPLE

It is theoretically possible to approach 100% efficiency if the following conditions are met:

1. The drive circuitry consumes little power.

2. The power switches are matched and have low Ron.

3. The impedance of the reservoir and pump capacitors are negligibly small at the pumping frequency.

The LMC7660 closely approaches 1 and 2 above. By using a large pump capacitor Cp, the charge removed

while supplying the reservoir capacitor is small compared to Cp's total charge. Small removed charge means

small changes in the pump capacitor voltage, and thus small energy loss and high efficiency. The energy loss by

Cp is:

(1)

By using a large reservoir capacitor, the output ripple can be reduced to an acceptable level. For example, if the

load current is 5 mA and the accepted ripple is 200 mV, then the reservoir capacitor can omit approximately be

calculated from:

(2)

PRECAUTIONS

1. Do not exceed the maximum supply voltage or junction temperature.

2. Do not short pin 6 (LV terminal) to ground for supply voltages greater than 3.5V.

3. Do not short circuit the output to V+.

4. External electrolytic capacitors Cr and Cp should have their polarities connected as shown in Figure 1.

REPLACING PREVIOUS 7660 DESIGNS

To prevent destructive latchup, previous 7660 designs require a diode in series with the output when operated at

elevated temperature or supply voltage. Although this prevented the latchup problem of these designs, it lowered

the available output voltage and increased the output series resistance.

The TI LMC7660 has been designed to solve the inherent latch problem. The LCM7660 can operate over the

entire supply voltage and temperature range without the need for an output diode. When replacing existing

designs, the LMC7660 can be operated with diode Dx.

6

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