0

0

0

B2

B1

B0

0

0

1

1

1

0

A1 A0

Slave Address

R/W

Fixed

Programmable

0

19

TCA9538

www.ti.com

SCPS199D – AUGUST 2014 – REVISED OCTOBER 2016

Product Folder Links: TCA9538

Submit Documentation Feedback

Copyright © 2014–2016, Texas Instruments Incorporated

8.6 Register Map

8.6.1 Device Address

Figure 18 shows the address byte of the TCA9538.

Figure 18. TCA9538 Address

Table 2 shows the Address Reference of the TCA9538.

Table 2. Address Reference Table

INPUTS

I2C BUS SLAVE ADDRESS

A1

A0

L

L

112 (decimal), 70 (hexadecimal)

L

H

113 (decimal), 71 (hexadecimal)

H

L

114 (decimal), 72 (hexadecimal)

H

H

115 (decimal), 73 (hexadecimal)

The last bit of the slave address defines the operation (read or write) to be performed. When it is high (1), a read

is selected while a low (0) selects a write operation.

8.6.2 Control Register and Command Byte

Following the successful Acknowledgment of the address byte, the bus master sends a command byte that is

stored in the control register in the TCA9538 (see Figure 19). Two bits of this command byte state the operation

(read or write) and the internal register (input, output, polarity inversion or configuration) that is affected. This

register can be written or read through the I2C bus. The command byte is sent only during a write transmission.

Once a command byte has been sent, the register that was addressed continues to be accessed by reads until a

new command byte has been sent.

Figure 19. Control Register Bits

Table 3 shows the TCA9538 Command byte.

Table 3. Command Byte Table

CONTROL REGISTER BITS

COMMAND BYTE

(HEX)

REGISTER

PROTOCOL

POWER-UP DEFAULT

B1

B0

0

0

0x00

Input Port

Read byte

XXXX XXXX

0

1

0x01

Output Port

Read/write byte

1111 1111

1

0

0x02

Polarity Inversion

Read/write byte

0000 0000

1

1

0x03

Configuration

Read/write byte

1111 1111