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TPD4S1394DQLR Datasheet(PDF) 4 Page - Texas Instruments

Part # TPD4S1394DQLR
Description  TPD4S1394 Firewire ESD Clamp With Live-Insertion Detection Circuit
PDF  16 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TPD4S1394DQLR Datasheet(HTML) 4 Page - Texas Instruments

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TPD4S1394
SLVSA55B – NOVEMBER 2009 – REVISED NOVEMBER 2016
www.ti.com
Product Folder Links: TPD4S1394
Submit Documentation Feedback
Copyright © 2009–2016, Texas Instruments Incorporated
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
PARAMETER
MIN
MAX
UNIT
VCC
Supply voltage
3
3.6
V
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.4 Thermal Information
THERMAL METRIC(1)
TPD4S1394
UNIT
DQL (X2SON)
8 PINS
RθJA
Junction-to-ambient thermal resistance
167.5
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
56.8
°C/W
RθJB
Junction-to-board thermal resistance
82.3
°C/W
ψJT
Junction-to-top characterization parameter
1.5
°C/W
ψJB
Junction-to-board characterization parameter
82
°C/W
(1)
A 0.1-µF decoupling capacitor is required at VCC.
6.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VDX
FWPWR_EN trip voltage
(D+ and D– pins)
High-to-low
2.9
3.4
4
V
Low-to-high
2.7
3.2
3.8
VCLMP
Value on pin
No connection
2.45
V
VBR
Breakdown voltage at VCLAMP
II = 1 mA
4.2
V
VD
Diode forward voltage for lower clamp
ID = 8 mA lower clamp diode
–0.6
–0.8
–0.95
V
FWPWR_EN
Switch output
VCC
V
RDYN
Dynamic resistance (in and out clamp) of D+, D–
I = 1 A
1
Ω
CIO
I/O capacitance of D+, D–
VIO = 2.5 V
1.5
2
pF
ICC
Current consumption
VCC = 3.3 V, FWPWR_EN = high
130
200
µA
6.6 Switching Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tTRIP
Delay time for FWPWR_EN to go low
Loading on FWPWR_EN = 50 pF
0.5
2
5
µs
tRESET
Delay time for FWPWR_EN to go high after trip
FWPWR_EN = VCC
300
450
600
ms



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