-18

-15

-12

-9

-6

-3

0

1.0E+07

1.0E+08

1.0E+09

1.0E+10

Frequency (Hz)

-3.0 dB Frequency = 2.4 GHz

0.0

0.5

1.0

1.5

2.0

2.5

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

Voltage Bias (V)

8

TPD4S1394

SLVSA55B – NOVEMBER 2009 – REVISED NOVEMBER 2016

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Product Folder Links: TPD4S1394

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Copyright © 2009–2016, Texas Instruments Incorporated

8.2.2 Detailed Design Procedure

The data transfer rate of 800 Mbps is well below the bandwidth of the data pins of TPD4S1394. So the parasitics

associated with the ESD cells on these lines do not degrade the signal integrity. 3.3-V power supplies are

commonly available from the board and can be used to power the live insertion detection circuit.

8.2.3 Application Curves

D+, D– Pins

Figure 4. I/O Capacitance vs I/O Voltage

D+, D– Pins

Figure 5. Insertion Loss (S21)

9 Power Supply Recommendations

TI recommends a power supply for VCC is from 3 V to 3.6 V.

10 Layout

10.1 Layout Guidelines

•

The optimum placement is as close to the connector as possible.

–

EMI during an ESD event can couple from the trace being struck to other nearby unprotected traces,

resulting in early system failures.

–

The PCB designer must minimize the possibility of EMI coupling by keeping any unprotected traces away

from the protected traces which are between the TVS and the connector.

•

Route the protected traces as straight as possible.

•

Eliminate any sharp corners on the protected traces between the TVS and the connector by using rounded

corners with the largest radii possible.

–

Electric fields tend to build up on corners, increasing EMI coupling.