INL+

INR+

INR-

OUTL

HPVDD

COM

OUTR

HPVSS

A

B

C

D

SW

C1N

SDA

INL-

C1P

VDD

GND

SCL

2

1

4

3

LM48824

www.ti.com

SNAS479D – MARCH 2009 – REVISED MAY 2013

Connection Diagram

Top View

Figure 2.

DSBGA Package (1.7mm x 1.7mm x 0.6mm)

See Package Number YFQ0016DDA

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1) (2) (3) (4)

Supply Voltage(1)

6V

Storage Temperature

−65°C to +150°C

Input Voltage

-0.3V to VDD + 0.3V

Power Dissipation(5)

Internally Limited

ESD Rating(6)

2000V

ESD Rating(7)

200V

ESD Rating(8)

500V

Junction Temperature

150°C

Vapor Phase (60 sec.)

215°C

Soldering Information

Infrared (15 sec.)

220°C

Thermal Resistance

θJA (YFQ0016DDA)

60°C/W

(1)

Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of

device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or

other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating

Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All

voltages are measured with respect to the ground pin, unless otherwise specified

(2)

The Electrical Characteristics tables list specified specifications under the listed Recommended Operating Conditions except as

otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and

are not ensured.

(3)

Soldering Information: See AN-1112 “Micro SMD Wafer Level Chip Scale package”

(4)

If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and

specifications.

(5)

The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX , θJA, and the ambient temperature,

TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings,

whichever is lower.

(6)

Human body model, applicable std. JESD22-A114C.

(7)

Machine model, applicable std. JESD22-A115-A.

(8)

Charged Device Model, applicable std. JESD22-C101-C.

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