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LP8551TLX-A/NOPB.A Datasheet(PDF) 23 Page - Texas Instruments

Part # LP8551TLX-A/NOPB.A
Description  LP8551 High-Efficiency LED Backlight Driver for Notebooks
PDF  46 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

LP8551TLX-A/NOPB.A Datasheet(HTML) 23 Page - Texas Instruments

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LP8551
www.ti.com
SNVS673E – APRIL 2010 – REVISED SEPTEMBER 2014
Programming (continued)
•
Master device sends slave address (7 bits) and the data direction bit (r/w = 0).
•
Slave device sends acknowledge signal if the slave address is correct.
•
Master sends control register address (8 bits).
•
Slave sends acknowledge signal.
•
Master sends data byte to be written to the addressed register.
•
Slave sends acknowledge signal.
•
If master sends further data bytes the control register address is incremented by one after acknowledge
signal.
•
Write cycle ends when the master creates stop condition.
8.5.1.7 Control Register Read Cycle
•
Master device generates a start condition.
•
Master device sends slave address (7 bits) and the data direction bit (r/w = 0).
•
Slave device sends acknowledge signal if the slave address is correct.
•
Master sends control register address (8 bits).
•
Slave sends acknowledge signal.
•
Master device generates repeated start condition.
•
Master sends the slave address (7 bits) and the data direction bit (r/w = 1).
•
Slave sends acknowledge signal if the slave address is correct.
•
Slave sends data byte from addressed register.
•
If the master device sends acknowledge signal, the control register address is incremented by one. Slave
device sends data byte from addressed register.
•
Read cycle ends when the master does not generate acknowledge signal after data byte and generates stop
condition.
Table 3. Data Read and Write Cycles
ADDRESS MODE
<Start Condition>
<Slave Address><r/w = 0>[Ack]
<Register Addr.>[Ack]
<Repeated Start Condition>
Data Read
<Slave Address><r/w = 1>[Ack]
[Register Data]<Ack or NAck>
… additional reads from subsequent register address possible
<Stop Condition>
<Start Condition>
<Slave Address><r/w=’0’>[Ack]
<Register Addr.>[Ack]
Data Write
<Register Data>[Ack]
… additional writes to subsequent register address possible
<Stop Condition>
Copyright © 2010–2014, Texas Instruments Incorporated
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