 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
ADV7182ABCPZ Datasheet(PDF) 83 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADV7182ABCPZ Datasheet(HTML) 83 Page - Analog Devices |
|
|
83 / 102 page  Data Sheet ADV7182A Rev. 0 | Page 83 of 102 Main Map Bits (Shading Indicates Default State) Comments Notes Subaddress Register Bit Description 7 6 5 4 3 2 1 0 0x51 Lock count CIL[2:0]; count into lock determines the number of lines the system must remain in lock before showing a locked status 0 0 0 One line of video 0 0 1 Two lines of video 0 1 0 Five lines of video 0 1 1 10 lines of video 1 0 0 100 lines of video 1 0 1 500 lines of video 1 1 0 1000 lines of video 1 1 1 100,000 lines of video COL[2:0]; count out of lock determines the number of lines the system must remain out-of-lock before showing a lost-locked status 0 0 0 One line of video 0 0 1 Two lines of video 0 1 0 Five lines of video 0 1 1 10 lines of video 1 0 0 100 lines of video 1 0 1 500 lines of video 1 1 0 1000 lines of video 1 1 1 100,000 lines of video SRLS; select raw lock signal and selects the determination of the lock status 0 Over field with vertical info 1 Line to line evaluation FSCLE; fSC lock enable 0 Lock status set only by horizontal lock 1 Lock status set by horizontal lock and subcarrier lock 0x60 ADC Switch 3 MUX_3[2:0] 0 0 0 0 No connect 0 0 0 1 No connect 0 0 1 0 AIN2 0 0 1 1 No connect 0 1 0 0 AIN4 Reserved 0 0 0 1 0 0x6A Output Sync Select 1 HS_OUT_SEL[2:0] selects which sync comes out on the HS pin 0 0 0 HSYNC 0 0 1 VSYNC 0 1 0 FIELD 0 1 1 DE 1 0 0 SFL Reserved 0 0 0 0 0 0x6B Output Sync Select 2 FLD_OUT_SEL[2:0] selects which sync comes out on the VS/FIELD/SFL pin 0 0 0 HSYNC 0 0 1 VSYNC 0 1 0 FIELD 0 1 1 DE 1 0 0 SFL Reserved 0 0 0 1 0 Set as default 0x8F Freerun Line Length 1 Reserved 0 0 0 0 Set as default LLC_PAD_SEL[2:0]; enables manual selection of the clock for the LLC pin 0 0 0 LLC (nominal 27 MHz) selected out on LLC pin 1 0 1 LLC (nominal 13.5 MHz) selected out on LLC pin Reserved 0 Sets to default 0x99 CCAP1 (read only) CCAP1[7:0]; closed caption data register x x x x x x x x CCAP1[7] contains parity bit for Byte 0 0x9A CCAP2 (read only) CCAP2[7:0]; closed caption data register x x x x x x x x CCAP2[7] contains parity bit for Byte 0 0x9B Letterbox 1 (read only) LB_LCT[7:0]; letterbox data register x x x x x x x x Reports the number of black lines detected at the top of active video This feature examines the active video at the start and end of each field; it enables format detection even if the video is not accompanied 0x9C Letterbox 2 (read only) LB_LCM[7:0]; letterbox data register x x x x x x x x Reports the number of black lines detected in the middle half of active video if subtitles are detected |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
