ADS131E04IPAG datasheet(21/76 Pages) TI2

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INxP

INxN

VCM

INxP

INxN

VCM

a) Psuedo-Differential Input

b) Differential Input

VREF / Gain

Peak-to-Peak

VREF / Gain

Peak-to-Peak

Common

Voltage

Device

VREF / Gain

Common

Voltage

Device

ADS131E04, ADS131E06, ADS131E08

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SBAS561C – JUNE 2012 – REVISED JANUARY 2017

Product Folder Links: ADS131E04 ADS131E06 ADS131E08

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Feature Description (continued)

9.3.3 Analog Input

The analog inputs to the device connect directly to an integrated low-noise, low-drift, high input impedance,

programmable gain amplifier. The amplifier is located following the individual channel multiplexer.

The ADS131E0x analog inputs are fully differential. The differential input voltage (VINxP – VINxN) can span from

–VREF / gain to VREF / gain. See the Data Format section for an explanation of the correlation between the analog

input and digital codes. There are two general methods of driving the ADS131E0x analog inputs: pseudo-

differential or fully-differential, as shown in Figure 18, Figure 19, and Figure 20.

Figure 18. Methods of Driving the ADS131E0x: Pseudo-Differential or Fully Differential

Figure 19. Pseudo-Differential Input Mode

Figure 20. Fully-Differential Input Mode

Hold the INxN pin at a common voltage, preferably at mid supply, to configure the fully differential input for a

pseudo-differential signal. Swing the INxP pin around the common voltage –VREF / gain to VREF / gain and remain

within the absolute maximum specifications. Verify that the differential signal at the minimum and maximum

points meets the common-mode input specification discussed in the Input Common-Mode Range section.

Configure the signals at INxP and INxN to be 180° out-of-phase centered around a common-mode voltage, VCM,

to use a fully-differential input method. Both the INxP and INxN inputs swing from the VCM + ½ VREF / gain to the

VCM – ½ VREF / gain. The differential voltage at the maximum and minimum points is equal to –VREF / gain to

VREF / gain. Use the ADS131E0x in a differential configuration to maximize the dynamic range of the data

converter. For optimal performance, the common-mode voltage is recommended to be set at the midpoint of the

analog supplies [(AVDD + AVSS) / 2].

If any of the analog input channels are not used, then power-down these pins using register bits to conserve

power. See the SPI Command Definitions section for more information on how to power-down individual

channels. Tie any unused or powered down analog input pins directly to AVDD.

ADS131E04IPAG Datasheet(PDF) 21 Page - Texas Instruments

ADS131E04IPAG Datasheet(HTML) 21 Page - Texas Instruments

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