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AMC0106M25 Datasheet(PDF) 27 Page - Texas Instruments

Part # AMC0106M25
Description  AMC0106M25 Precision, ±250mV Input, Functionally Isolated, Delta-Sigma Modulator With External Clock
PDF  35 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

AMC0106M25 Datasheet(HTML) 27 Page - Texas Instruments

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7.4 Power Supply Recommendations
The AMC0106M25 does not require any specific power-up sequencing. The high-side power supply (AVDD) is
decoupled with a low-ESR, 100nF capacitor (C1) parallel to a low-ESR, 1μF capacitor (C2). The low-side power
supply (DVDD) is equally decoupled with a low-ESR, 100nF capacitor (C3) parallel to a low-ESR, 1μF capacitor
(C4). Place all four capacitors (C1, C2, C3, and C4) as close to the device as possible. Figure 7-4 shows a
decoupling diagram for the AMC0106M25.
R3 49.9
R2 10
R1 10
C5 10 nF
AVDD
DVDD
from MCU
to MCU
AVDD
AGND
INP
INN
DVDD
CLKIN
DOUT
DGND
C2 1 µF
C1 100 nF
C4 1 µF
C3 100 nF
C6 1 nF
C7 1 nF
I
Figure 7-4. Decoupling of the AMC0106M25
Capacitors have to provide adequate effective capacitance under the applicable DC bias conditions that are
experienced in the application. Multilayer ceramic capacitors (MLCC) typically exhibit only a fraction of the
nominal capacitance under real-world conditions. Take this factor into consideration when selecting these
capacitors. This problem is especially acute in low-profile capacitors, in which the dielectric field strength is
higher than in taller components. Reputable capacitor manufacturers provide capacitance versus DC bias curves
that greatly simplify component selection.
7.5 Layout
7.5.1 Layout Guidelines
The Layout Example section provides a layout recommendation with the critical placement of the decoupling
capacitors (as close as possible to the AMC0106M25 supply pins). This section also depicts the placement of
other components required by the device. For best performance, place the sense resistor close to the device
input pins (INN and INP).
7.5.2 Layout Example
Top Metal
Inner or Bottom Layer Metal
Via
C2
C1
CLKIN (from MCU)
to MCU
DOUT
AGND
DGND
AVDD
INN
INP
DVDD
Clearance area, keep free of
any conductive materials
C4
C3
R3
C6
R1
R2
C7
Figure 7-5. Recommended Layout of the AMC0106M25
www.ti.com
AMC0106M25
SBASAX1A – AUGUST 2024 – REVISED JULY 2025
Copyright © 2025 Texas Instruments Incorporated
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Product Folder Links: AMC0106M25



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