STM32WL33CBVATR datasheet(70/91 Pages) STMICROELECTRONICS

Part #	STM32WL33CBVATR

Description	Multiprotocol LPWAN 32-bit MCU Arm® Cortex®-M0 2(G)FSK, 4(G)FSK, ASK, D-BPSK, up to 256KB flash, 32KB SRAM

PDF	91 Pages

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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70 / 91 page

6.3.20

I2C interface characteristics

The I2C interface meets the timings requirements of the I2C-bus specification for:

•

Standard-mode (Sm): bit rate up to 100 kbit/s

•

Fast-mode (Fm): bit rate up to 400 kbit/s

•

Fast-mode Plus (Fm+): bit rate up to 1 Mbit/s.

The SDA and SCL I/O requirements are met with the following restriction: the SDA and SCL I/O pins are not “true”

open-drain. When configured as open-drain, the PMOS connected between the I/O pin and VDD is disabled, but

is still present. The 20 mA output drive requirement in Fast-mode Plus is supported partially.

This limits the maximum load Cload supported in Fast-mode Plus, given by these formulas:

•

tr(SDA/SCL) = 0.8473 x Rp x Cload

•

Rp(min) = [VDD - VOL(max)] / IOL(max)

where Rp is the I2C line pull-up.

All I2C SDA and SCL I/Os embed an analog filter.

Table 63. I2C analog filter characteristics (specified by design - not tested in production)

Symbol

Parameter

Min

Max

Unit

tAF

Maximum pulse width of spikes that are suppressed

by the analog filter.

110

STM32WL33xx

Electrical characteristics

DS14221 - Rev 5

page 70/91

STM32WL33CBVATR Datasheet(PDF) 70 Page - STMicroelectronics