DS250DF230ZLSR datasheet(95/119 Pages) TI2

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9.2.1.1 Design Requirements

For this design example, the following guidelines outlined in Table 9-1 apply.

Table 9-1. Front-Port Application Design Guidelines

DESIGN PARAMETER

REQUIREMENT

AC-coupling capacitors

Egress (ASIC-to-module) direction: AC-coupling capacitors in the

range of 100 to 220 nF are required for the RX inputs and are NOT

required for the TX outputs.

Ingress (module-to-ASIC) direction: AC-coupling capacitors in the

range of 100 to 220 nF are required for the TX outputs and are NOT

required for the RX inputs.

Input channel insertion loss

≤ 35 dB at 25.78125-Gbps Nyquist frequency (12.9 GHz)

Output channel insertion loss

Egress (ASIC-to-module) direction: Follow CAUI-4 / CEI-25G-VSR

host channel requirements (approximately 7 dB at 12.9 GHz).

Ingress (module-to-ASIC) direction: Depends on downstream ASIC /

FPGA capabilities. The DS250DF230 has a low-jitter output driver

with 3-tap FIR filter for equalizing a portion of the output channel.

Host ASIC TX launch amplitude

800 mVppd to 1200 mVppd.

Host ASIC TX FIR filter

Depends on channel loss. Refer to the Setting the Output VOD, Pre-

Cursor, and Post-Cursor Equalization section.

9.2.1.2 Detailed Design Procedure

The design procedure for front-port applications is as follows:

1. Determine the total number of channels on the board which require a DS250DF230 for signal conditioning.

This will dictate the total number of DS250DF230 devices required for the board. It is generally

recommended that channels connected to the same front-port cage be grouped together in the same

DS250DF230 device. This will simplify the device settings, as similar loss channels generally use similar

settings.

2. Determine the maximum current draw required for all DS250DF230 retimers. This may impact the selection

of the regulator for the 2.5-V supply rail. To calculate the maximum current draw, multiply the maximum

transient power supply current by the total number of DS250DF230 devices.

3. Determine the maximum operational power consumption for the purpose of thermal analysis. There are two

ways to approach this calculation:

a. Maximum mission-mode operational power consumption is when all channels are locked and re-

transmitting the data which is received. PRBS pattern checkers/generators are not used in this mode

because normal traffic cannot be checked with a PRBS checker. For this calculation, multiply the

worst-case power consumption in mission mode by the total number of DS250DF230 devices.

b. Maximum debug-mode operational power consumption is when all channels are locked and re-

transmitting the data which is received. At the same time, some channels’ PRBS checkers or generators

may be enabled. For this calculation, multiply the worst-case power consumption in debug mode by the

total number of DS250DF230 devices.

4. Determine the SMBus address scheme needed to uniquely address each DS250DF230 device on the board,

depending on the total number of devices identified in step 2. Each DS250DF230 can be strapped with one

of 16 unique SMBus addresses. If there are more DS250DF230 devices on the board than the number of

unique SMBus addresses which can be assigned, then use an I2C expander like the TCA/PCA family of

I2C/SMBus switches and multiplexers to split up the SMBus into multiple busses.

5. Determine if the device will be configured from EEPROM (SMBus Master Mode) or from the system I2C bus

(SMBus Slave Mode).

a. If SMBus Master Mode will be used, provisions must be made for an EEPROM on the board with 8-bit

SMBus address 0xA0. Refer to SMBus Master Mode for more details on SMBus Master Mode including

EEPROM size requirements.

b. If SMBus Slave Mode will be used for all device configurations, an EEPROM is not needed.

6. Make provisions in the schematic and layout for standard decoupling capacitors between the device VDD

supply and GND. Refer to the pin function description in Pin Configuration and Functions for more details.

www.ti.com

DS250DF230

SNLS590C – AUGUST 2018 – REVISED JUNE 2021

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DS250DF230ZLSR Datasheet(PDF) 95 Page - Texas Instruments

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