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ADGM3144BCCZ-R2 Datasheet(PDF) 20 Page - Analog Devices |
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ADGM3144BCCZ-R2 Datasheet(HTML) 20 Page - Analog Devices |
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20 / 30 page ![]() Data Sheet ADGM3144 THEORY OF OPERATION analog.com Rev. 0 | 20 of 30 SWITCH DESIGN The ADGM3144 is a wideband SP4T switch fabricated using Ana- log Devices' MEMS switch technology. This technology enables high power, low loss, low distortion gigahertz switches to be realiz- ed for demanding RF applications. A key strength of the MEMS switch is that it simultaneously brings together best-in-class high frequency RF performance and 0Hz/DC precision performance. This combination coupled with superior reliability and a tiny surface mountable form factor make the MEMS switch the ideal switching solution for all RF and precision signal instrumentation needs. The switches are electrostatically actuated MEMS structures. An on board charge pump internally generates the bias voltage (80V) used for actuation of the switch. PARALLEL DIGITAL INTERFACE The ADGM3144 can be controlled through a parallel interface. Standard complementary metal-oxide semiconductor (CMOS) or low voltage transistor-transistor logic (LVTTL) signals applied through this interface control the independent actuation or release of all the switch channels of the ADGM3144. Setting Pin 19 (PIN/SPI) low enables the parallel control interface. Pin 20, Pin 21, Pin 22, and Pin 23 (IN1, IN2, IN3, and IN4) control the switching functions of the ADGM3144. When a Logic 1 is applied to one of these pins, the corresponding switch turns on. Conversely, when a Logic 0 is applied, the switch turns off. See Table 7 for the truth table. When no supply voltage is applied to Pin 1 (VDD), all switches are in an indeterminate state. Table 7. Truth Table in Parallel Digital Interface Mode IN1 IN2 IN3 IN4 RF1 to RFC RF2 to RFC RF3 to RFC RF4 to RFC 0 0 0 0 Off Off Off Off 0 0 0 1 Off Off Off On 0 0 1 0 Off Off On Off 0 0 1 1 Off Off On On 0 1 0 0 Off On Off Off 0 1 0 1 Off On Off On 0 1 1 0 Off On On Off 0 1 1 1 Off On On On 1 0 0 0 On Off Off Off 1 0 0 1 On Off Off On 1 0 1 0 On Off On Off 1 0 1 1 On Off On On 1 1 0 0 On On Off Off 1 1 0 1 On On Off On 1 1 1 0 On On On Off 1 1 1 1 On On On On |
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