AT45DQ321 datasheet(21/80 Pages) RENESAS

21 / 80 page

DS-AT45DQ321-031 Rev. H

Page 21

7/22/24

AT45DQ321 Datasheet

Example: If only two data bytes were clocked into the device, then only two bytes are programmed into main memory

and the remaining bytes in the memory page remain in their previous state.

The CS pin must be deasserted on a byte boundary (multiples of eight bits); otherwise, the operation is aborted

and no data are programmed. The programming of the data bytes is internally self-timed and take place in a

maximum time of tP (the program time is a multiple of the tBP time depending on the number of bytes being

programmed). During this time, the RDY/BUSY bit in the Status Register indicates that the device is busy.

The device also incorporates an intelligent programming algorithm that can detect when a byte location fails to

program properly. If a programming error arises, it is indicated by the EPE bit in the Status Register.

7.8

Page Erase

The Page Erase command can be used to individually erase any page in the main memory array allowing the

Buffer to Main Memory Page Program without Built-In Erase command or the Main Memory Byte/Page Program

through Buffer 1 command to be utilized at a later time.

To perform a Page Erase with the standard DataFlash page size (528 bytes), an opcode of 81h must be clocked

into the device followed by three address bytes comprised of 1 dummy bit, 13 page address bits (PA12 - PA0) that

specify the page in the main memory to be erased, and 10 dummy bits.

To perform a Page Erase with the binary page size (512 bytes), an opcode of 81h must be clocked into the device

followed by three address bytes comprised of 2 dummy bits, 13 page address bits (A21 - A9) that specify the page

in the main memory to be erased, and 9 dummy bits.

When a low-to-high transition occurs on the CS pin, the device erases the selected page (the erased state is a

Logic 1). The erase operation is internally self-timed and takes place in a maximum time of tPE. During this time,

the RDY/BUSY bit in the Status Register indicates that the device is busy.

The device also incorporates an intelligent erase algorithm that can detect when a byte location fails to erase

properly. If an erase error arises, it is indicated by the EPE bit in the Status Register.

AT45DQ321 Datasheet(PDF) 21 Page - Renesas Technology Corp