C8051F310 datasheet(64/228 Pages) SILABS

64 / 228 page

C8051F310/1/2/3/4/5/6/7

Rev. 1.7

5.4.2. Window Detector In Differential Mode

Figure 5.8

shows

two

example

window

comparisons

for

right-justified,

differential

data,

with

ADC0LTH:ADC0LTL = 0x0040 (+64d) and ADC0GTH:ADC0GTH = 0xFFFF (-1d). In differential mode, the

measurable voltage between the input pins is between -VREF and VREF*(511/512). Output codes are rep-

resented as 10-bit 2’s complement signed integers. In the left example, an AD0WINT interrupt will be gen-

erated if the ADC0 conversion word (ADC0H:ADC0L) is within the range defined by ADC0GTH:ADC0GTL

and ADC0LTH:ADC0LTL (if 0xFFFF (-1d) < ADC0H:ADC0L < 0x0040 (64d)). In the right example, an

AD0WINT interrupt will be generated if the ADC0 conversion word is outside of the range defined by the

ADC0GT and ADC0LT registers (if ADC0H:ADC0L < 0xFFFF (-1d) or ADC0H:ADC0L > 0x0040 (+64d)).

Figure 5.9 shows an example using left-justified data with the same comparison values.

Figure 5.8. ADC Window Compare Example: Right-Justified Differential Data

Figure 5.9. ADC Window Compare Example: Left-Justified Differential Data

0x01FF

0x0041

0x0040

0x003F

0x0000

0xFFFF

0xFFFE

0x0200

-VREF

Input Voltage

(Px.x - Px.x)

VREF x (511/512)

VREF x (64/512)

VREF x (-1/512)

0x01FF

0x0041

0x0040

0x003F

0x0000

0xFFFF

0xFFFE

0x0200

-VREF

Input Voltage

(Px.x - Px.x)

VREF x (511/512)

VREF x (64/512)

VREF x (-1/512)

AD0WINT=1

AD0WINT

not affected

AD0WINT

not affected

ADC0LTH:ADC0LTL

ADC0GTH:ADC0GTL

AD0WINT

not affected

AD0WINT=1

ADC0H:ADC0L

ADC0GTH:ADC0GTL

ADC0LTH:ADC0LTL

0x7FC0

0x1040

0x1000

0x0FC0

0x0000

0xFFC0

0xFF80

0x8000

-VREF

Input Voltage

(Px.x - Px.y)

VREF x (511/512)

VREF x (64/512)

VREF x (-1/512)

0x7FC0

0x1040

0x1000

0x0FC0

0x0000

0xFFC0

0xFF80

0x8000

-VREF

Input Voltage

(Px.x - Px.x)

VREF x (511/512)

VREF x (64/512)

VREF x (-1/512)

AD0WINT=1

AD0WINT

not affected

AD0WINT

not affected

ADC0LTH:ADC0LTL

ADC0GTH:ADC0GTL

AD0WINT

not affected

ADC0GTH:ADC0GTL

AD0WINT=1

ADC0H:ADC0L

ADC0LTH:ADC0LTL

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