DA7218 datasheet(36/154 Pages) RENESAS

36 / 154 page

Ultra-Low Power Stereo Codec

R32DS0004EE0370 Revision 3.7

Aug 9, 2024

CFR0011-120-00

Page 36

11.025/12.0

Not supported

Supported

16.0

Not supported

Supported

22.050/24.0

Not supported

Supported

32.0

Not supported

Supported

44.100/48.0

Not supported

Supported

Not supported

Supported

88.200/96.0

Not supported

Supported

9.2.2.1

High Performance Mode

In normal (high performance) mode (adc_lp_mode = 0), the ADCs are clocked at a fixed rate of either 3.072 MHz

or 2.8224 MHz, depending on the required input sample rate (SR1).

9.2.2.2

Low-Power Mode

The low-power mode of operation is designed for always-on applications. In low-power mode, the ADCs are

clocked at half the "normal" (high-performance) rate, that is, at either 1.5360 MHz or 1.4112 MHz. Low-power

mode is set in both ADCs by setting adc_lp_mode = 1. In this mode, there is a small increase in distortion.

9.2.2.3

Anti-Alias Filters

The anti-alias filters at the front-end of the ADC are enabled by default. The anti-alias filters can be disabled to

save power by setting adc_1_aaf_en = 0 for channel 1, or adc_2_aaf_en = 0 for channel 2.

9.3

Digital Engine

The DA7218 chip contains a digital engine that performs the signal processing and also provides overall system

control. Within the digital engine, all seven possible input signals can be mixed and output to any of the six

possible outputs. See Figure 9 for a visual representation of this.

The output signals from either of the two ADCs or any of the four digital microphones are passed to the input

filter block. The filter block includes a high-pass filter for wind noise suppression, an automatic level control, and

input level detection.

The signals from the input filters are sent to the digital mixer where they can be combined with signals from the

tone generator and the DAI, and routed to the output filters and the DAI. The output filters contain a high-pass

filter for DC offset removal, a fixed 5-band equalizer, and a flexible 5-stage biquad filter to adjust the sound of the

output signals.

There is also a sidetone path that can take one signal from either the ADCs or the digital microphones and

perform filtering using three biquad sections before passing the signal straight to the output filters.

The digital engine contains a DRE module that can be used to automatically swap analog and digital gains on

the input and output signal paths in order to maximize the dynamic range of the codec.

Finally, a system controller module is included to ensure correct sequencing of the events required to bring up

and shut down signal paths without creating pops and clicks.

DA7218 Datasheet(PDF) 36 Page - Renesas Technology Corp

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