M58WR128EB datasheet(27/87 Pages) STMICROELECTRONICS

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M58WR128ET, M58WR128EB

(no wrap). The Wrap Burst bit is used to select be-

tween wrap and no wrap. When the Wrap Burst bit

is set to ‘0’ the burst read wraps; when it is set to

‘1’ the burst read does not wrap.

Burst length Bits (CR2-CR0)

The Burst Length bits set the number of Words to

be output during a Synchronous Burst Read oper-

ation as result of a single address latch cycle.

They can be set for 4 words, 8 words, 16 words or

continuous burst, where all the words are read se-

quentially.

In continuous burst mode the burst sequence can

cross bank boundaries.

In continuous burst mode, in 4, 8 words no-wrap,

or in 16 words, depending on the starting address,

the device asserts the WAIT output to indicate that

a delay is necessary before the data is output.

If the starting address is aligned to a 4 word

boundary no wait states are needed and the WAIT

output is not asserted.

If the starting address is shifted by 1, 2 or 3 posi-

tions from the four word boundary, WAIT will be

asserted for 1, 2 or 3 clock cycles when the burst

sequence crosses the first 64 word boundary, or

the 16 word boundary in the case of 16-word wrap

burst, to indicate that the device needs an internal

delay to read the successive words in the array.

WAIT will be asserted only once during a continu-

ous burst access. See also Table 10, Burst Type

Definition.

CR14, CR5 and CR4 are reserved for future use.

M58WR128EB Datasheet(PDF) 27 Page - STMicroelectronics