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PSD813F1 Datasheet(PDF) 102 Page - STMicroelectronics |
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PSD813F1 Datasheet(HTML) 102 Page - STMicroelectronics |
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102 / 120 page  PSD813F1-A Preliminary 98 -15 -20 Symbol Parameter Conditions Min Max Min Max Unit tLVDV ALE Access Time from Power Down 150 200 ns Maximum Delay from APD Enable tCLWH to Internal PDN Valid Signal Using CLKIN Input 15 * tCLCL (Note 1) µs Power Down Timing (3.0 V to 3.6 V Versions) Symbol Parameter Conditions Min Typ Max Unit tNLNH Warm RESET Active Low Time (Note 1) 300 ns tOPR RESET High to Operational Device 300 ns tNLNH-PO Power On Reset Active Low Time 1ms (Note 2) Reset Timing (3.0 V to 3.6 V Versions) NOTE: 1. tCLCL is the CLKIN clock period. Microcontroller Interface – PSD813F1V AC/DC Parameters (3.0 V to 3.6 V Versions) Symbol Parameter Conditions Min Typ Max Unit tBVBH Vstby Detection to Vstbyon Output High 2.0 µs tBXBL Vstby Off Detection to Vstbyon Output Low 2.0 µs Vstbyon Timing (3.0 V to 3.6 V Versions) NOTE: 1. RESET will not reset Flash or EEPROM programming/erase cycles. 2. tNLNH-PO is 10 ms for devices manufactured before the rev. A. |
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