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NRF52810-QCAA-R7 Datasheet(PDF) 445 Page - Nordic Semiconductor |
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NRF52810-QCAA-R7 Datasheet(HTML) 445 Page - Nordic Semiconductor |
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445 / 483 page ![]() Peripherals Register Offset Description ERRORSRC 0x480 Error source Note : this register is read / write one to clear. ENABLE 0x500 Enable UART PSEL.RTS 0x508 Pin select for RTS signal PSEL.TXD 0x50C Pin select for TXD signal PSEL.CTS 0x510 Pin select for CTS signal PSEL.RXD 0x514 Pin select for RXD signal BAUDRATE 0x524 Baud rate. Accuracy depends on the HFCLK source selected. RXD.PTR 0x534 Data pointer RXD.MAXCNT 0x538 Maximum number of bytes in receive buffer RXD.AMOUNT 0x53C Number of bytes transferred in the last transaction TXD.PTR 0x544 Data pointer TXD.MAXCNT 0x548 Maximum number of bytes in transmit buffer TXD.AMOUNT 0x54C Number of bytes transferred in the last transaction CONFIG 0x56C Configuration of parity and hardware flow control Table 95: Register Overview 6.25.9.1 SHORTS Address offset: 0x200 Shortcut register Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Id D C Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Id RW Field Value Id Value Description C RW ENDRX_STARTRX Shortcut between ENDRX event and STARTRX task See EVENTS_ENDRX and TASKS_STARTRX Disabled 0 Disable shortcut Enabled 1 Enable shortcut D RW ENDRX_STOPRX Shortcut between ENDRX event and STOPRX task See EVENTS_ENDRX and TASKS_STOPRX Disabled 0 Disable shortcut Enabled 1 Enable shortcut 6.25.9.2 INTEN Address offset: 0x300 Enable or disable interrupt Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Id L J I H G F E D C B A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Id RW Field Value Id Value Description A RW CTS Enable or disable interrupt for CTS event See EVENTS_CTS Disabled 0 Disable Enabled 1 Enable 4430_161 v1.0 445 |
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