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NRF52810-QCAA-R7 Datasheet(PDF) 190 Page - Nordic Semiconductor

Part # NRF52810-QCAA-R7
Description  RF52810
PDF  483 Pages
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Manufacturer  NORDIC [Nordic Semiconductor]
Direct Link  https://www.nordicsemi.com/
Logo NORDIC - Nordic Semiconductor

NRF52810-QCAA-R7 Datasheet(HTML) 190 Page - Nordic Semiconductor

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Peripherals
This feature is always enabled although the peripheral itself appears to be IDLE, that is, no clocks or
other power intensive infrastructure have to be requested to keep this feature enabled. This feature can
therefore be used to wake up the CPU from a WFI or WFE type sleep in System ON with all peripherals and
the CPU idle, that is, lowest power consumption in System ON mode.
In order to prevent spurious interrupts from the PORT event while configuring the sources, the user
shall first disable interrupts on the PORT event (through INTENCLR.PORT), then configure the sources
(PIN_CNF[n].SENSE), clear any potential event that could have occurred during configuration (write '1' to
EVENTS_PORT), and finally enable interrupts (through INTENSET.PORT).
6.9.3 Tasks and events pin configuration
Each GPIOTE channel is associated with one physical GPIO pin through the CONFIG.PSEL field.
When Event mode is selected in CONFIG.MODE, the pin specified by CONFIG.PSEL will be configured
as an input, overriding the DIR setting in GPIO. Similarly, when Task mode is selected in CONFIG.MODE,
the pin specified by CONFIG.PSEL will be configured as an output overriding the DIR setting and OUT
value in GPIO. When Disabled is selected in CONFIG.MODE, the pin specified by CONFIG.PSEL will use its
configuration from the PIN[n].CNF registers in GPIO.
Only one GPIOTE channel can be assigned to one physical pin. Failing to do so may result in unpredictable
behavior.
6.9.4 Registers
Base address
Peripheral
Instance
Description
Configuration
0x40006000
GPIOTE
GPIOTE
GPIO tasks and events
Table 40: Instances
Register
Offset
Description
TASKS_OUT[0]
0x000
Task for writing to pin specified in CONFIG[0].PSEL. Action on pin is configured in
CONFIG[0].POLARITY.
TASKS_OUT[1]
0x004
Task for writing to pin specified in CONFIG[1].PSEL. Action on pin is configured in
CONFIG[1].POLARITY.
TASKS_OUT[2]
0x008
Task for writing to pin specified in CONFIG[2].PSEL. Action on pin is configured in
CONFIG[2].POLARITY.
TASKS_OUT[3]
0x00C
Task for writing to pin specified in CONFIG[3].PSEL. Action on pin is configured in
CONFIG[3].POLARITY.
TASKS_OUT[4]
0x010
Task for writing to pin specified in CONFIG[4].PSEL. Action on pin is configured in
CONFIG[4].POLARITY.
TASKS_OUT[5]
0x014
Task for writing to pin specified in CONFIG[5].PSEL. Action on pin is configured in
CONFIG[5].POLARITY.
TASKS_OUT[6]
0x018
Task for writing to pin specified in CONFIG[6].PSEL. Action on pin is configured in
CONFIG[6].POLARITY.
TASKS_OUT[7]
0x01C
Task for writing to pin specified in CONFIG[7].PSEL. Action on pin is configured in
CONFIG[7].POLARITY.
TASKS_SET[0]
0x030
Task for writing to pin specified in CONFIG[0].PSEL. Action on pin is to set it high.
TASKS_SET[1]
0x034
Task for writing to pin specified in CONFIG[1].PSEL. Action on pin is to set it high.
TASKS_SET[2]
0x038
Task for writing to pin specified in CONFIG[2].PSEL. Action on pin is to set it high.
TASKS_SET[3]
0x03C
Task for writing to pin specified in CONFIG[3].PSEL. Action on pin is to set it high.
TASKS_SET[4]
0x040
Task for writing to pin specified in CONFIG[4].PSEL. Action on pin is to set it high.
TASKS_SET[5]
0x044
Task for writing to pin specified in CONFIG[5].PSEL. Action on pin is to set it high.
TASKS_SET[6]
0x048
Task for writing to pin specified in CONFIG[6].PSEL. Action on pin is to set it high.
TASKS_SET[7]
0x04C
Task for writing to pin specified in CONFIG[7].PSEL. Action on pin is to set it high.
4430_161 v1.0
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