ST10R272LT1 datasheet(15/77 Pages) STMICROELECTRONICS

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ST10R272L - MULTIPLY-ACCUMULATE UNIT (MAC)

5.1

MAC Features

Enhanced addressing capabilities

•

Double indirect addressing mode with pointer post-modification.

•

Parallel Data Move allows one operand move during Multiply-Accumulate instructions

without penalty.

•

CoSTORE instruction (for fast access to the MAC SFRs) and CoMOV (for fast memory to

memory table transfer).

General

•

Two-cycle execution for all MAC operations.

•

16 x 16 signed/unsigned parallel multiplier.

•

40-bit signed arithmetic unit with automatic saturation mode.

•

40-bit accumulator.

•

8-bit left/right shifter.

•

Scaler (one-bit left shifter)

•

Data limiter

•

Full instruction set with multiply and multiply-accumulate, 32-bit signed arithmetic and

compare instructions.

•

Three 16-bit status and control registers: MSW: MAC Status Word, MCW: MAC Control

Word, MRW: MAC Repeat Word.

Program control

•

Repeat Unit allows some MAC co-processor instructions to be repeated up to 8192 times.

Repeated instructions may be interrupted.

•

MAC interrupt (Class B Trap) on MAC condition flags.

ST10R272LT1 Datasheet(PDF) 15 Page - STMicroelectronics