Rev 0.6

EMLS232UA Series

512K x 32 x 4Banks Low Power SDRAM

Partial Array Self Refresh

1. In order to save power consumption, Low Power SDRAM has PASR option.

2. Low Power SDRAM supports 3 kinds of PASR in self refresh mode : Four banks, Two banks and One bank.

Internal Temperature Compensated Self Refresh (TCSR)

NOTE :

1. In order to save power consumption,Low power SDRAM includes the internal temperature sensor and control units to control the

self refresh cycle automatically according to the two temperature range : Max 85 , Max 70 , Max 45 , Max 15

2. If the EMRS for exteranl TCSR is issued by the controller, this EMRS code for TCRS is ignored.

3. It has +/- 5

tolerance.

B. POWER UP SEQUENCE

1. Apply power and attempt to maintain CKE at a high state and all other inputs may be undefined.

2. Maintain stable power, stable clock and NOP input condition for a mininmun of 200 .

3. Issue precharge commands for all banks of the devices.

4. Issue 2 or more auto-refresh commands.

5. Issue a mode register set command to initialize the mode register.

6. Issue a extended mode register set command to define DS or PASR operating type of the device after normal MRS.

EMRS cycle is not mandatory and the EMRS command needs to be issued only when DS or PASR is used.

The default state without EMRS command issued is half driver strength and full array refreshed.

The device is now ready for the operation selected by EMRS.

For operating with DS or PASR, set DS or PASR mode in EMRS setting stage.

In order to adjust another mode in the state of DS or PASR mode, additional EMRS set is required but power up sequence is not

needed again at this time. In that case, all banks have to be in idle state prior to adjusting EMRS set.

Temperature Range

Self Refresh Current (Icc6)

Unit

Full Array

1/2 of Full Array

1/4 of Full Array

Max 85

250

190

150

Max 70

230

180

140

220

170

135

Max 15

210

160

130

BA1=0

BA0=0 BA0=1

BA1=0

BA1=0 BA1=0

BA0=0

BA1=1

BA1=1

BA0=0 BA0=1

- Four Banks

- Two Banks (Bank0,1)

- One Bank (Bank0)

Partial Self Refresh Area

BA1=1

BA1=1

BA1=0 BA1=0

BA0=0

BA0=1

BA1=1

BA0=1

BA0=0

BA0=0 BA0=1

BA1=1

BA0=1