EMLS232TA datasheet(10/14 Pages) EMLSI

10 / 14 page

Rev 0.3

EMLS232TA Series

512K x 32 x 4Banks Low Power SDRAM

AC CHARACTERISTICS

(AC operating conditions unless otherwise noted)

NOTE :

1. Parameters depend on programmed CAS latency.

2. If clock rising time is longer than 1 , (tr/2-0.5)

should be added to the parameter.

3. tAC(max) value is measured at the low Vdd(2.6V) and cold temperature(-25 ).

tAC is measured in the device with half driver strength(CL=10pF) and under the AC output load condition.

4. Assumed input rise and fall time (tr & tf) = 1 .

If tr & tf is longer than 1 , transient time compensation should be considered,

i.e., [(tr + tf)/2-1]

should be added to the parameter.

Parameter

Symbol

Value

Unit

Note

Min

Max

CLK cycle time

CAS latency=3

tCC

7.5

1000

CAS latency=2

tCC

CAS latency=1

tCC

CLK to valid output delay

CAS latency=3

tAC

1,2,3

CAS latency=2

tAC

CAS latency=1

tAC

Output data hold time

CAS latency=3

tOH

2.5

CAS latency=2

tOH

2.5

CAS latency=1

tOH

CLK high pulse width

tCH

2.5

CLK low pulse width

tCL

2.5

Input setup time

tSS

2.0

Input hold time

tSH

1.0

CLK to output in Low-Z

tSLZ

1.0

CLK to output in Hi-Z

CAS latency=3

tSHZ

CAS latency=2

CAS latency=1

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