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EMC646SP16K Datasheet(PDF) 21 Page - Emerging Memory & Logic Solutions Inc |
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EMC646SP16K Datasheet(HTML) 21 Page - Emerging Memory & Logic Solutions Inc |
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21 / 52 page ![]() EMC646SP16K 4Mx16 CellularRAM AD-MUX 21 Preliminary Software Access Software access of the registers uses a sequence of asynchronous READ and asynchronous WRITE operations. The contents of the configuration registers can be modified and all registers can be read using the software sequence. The configuration registers are loaded using a four-step sequence consisting of two asynchronous READ operations followed by two asynchronous WRITE operations (see Figure 13 on page 22). The READ sequence is virtually identical except that an asynchronous READ is performed during the fourth operation (see Figure 14 on page 22). The address used during all READ and WRITE operations is the highest address of the CellularRAM device being accessed (3FFFFFh); the contents of this address are not changed by using this sequence. The data value presented during the third operation (WRITE) in the sequence defines whether the BCR, RCR, or the DIDR is to be accessed. If the data is 0000h, the sequence will access the RCR; if the data is 0001h, the sequence will access the BCR; if the data is 0002h, the sequence will access the DIDR. This value must be valid at the falling edge of WE#. During the fourth operation, DQ[15:0] transfer data in to or out of bits 15:0 of the registers. The use of the software sequence does not affect the ability to perform the standard (CRE-controlled) method of loading the configuration registers. However, the software nature of this access mechanism eliminates the need for CRE. If the software mechanism is used, CRE can simply be tied to VSS. The port line often used for CRE control purposes is no longer required. |
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