EMC646SP16JS-12LF datasheet(26/65 Pages) EMLSI

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EMC646SP16J

4Mx16 CellularRAM

Preliminary

Table 6: Fixed Latency Configuration Codes

Figure 19: Latency Counter (Fixed Latency)

Operating Mode (BCR[15]) Default = Asynchronous Operation

The operating mode bit selects either synchronous burst operation or the default asynchronous mode of operation.

BCR[13:11]

Latency

Configuration

Code

Latency Count (N)

Max Input CLK Frequency (MHz)

104

010

2 (3 clocks)

33(30ns)

20(50ns)

011

3 (4 clocks)-default

52(19.2ns)

33(30ns)

100

4 (5 clocks)

66(15ns)

40(25ns)

101

5 (6 clocks)

75(13.3ns)

52(19.2ns)

110

6 (7 clocks)

104(9.62ns)

83(12ns)

66(15ns)

Others

Reserved

VIH

VIL

VIH

VIL

VIH

VIL

VIH

VIL

CLK

A[21:0]

ADV#

DQ[15:0]

Valid

Address

tAA

Cycle N

N-1

Cycles

tAADV

tCO

(READ)

(WRITE)

CE#

VOH

VOL

VOH

VOL

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Output

Valid

Input

Valid

Input

Valid

Input

Valid

Input

Valid

Input

Don’t Care

Undefined

Burst Identified

(ADV# = LOW)

tACLK

tSP tHD

EMC646SP16JS-12LF Datasheet(PDF) 26 Page - Emerging Memory & Logic Solutions Inc

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