AT89C51IC2-SLSCM datasheet(12/146 Pages) ATMEL

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AT89C51IC2

4301A–8051–01/04

I/O

P1.7: Input/Output:

I/O

CEX4: Capture/Compare External I/O for PCA module 4

I/O

MOSI: SPI Master Output Slave Input line

When SPI is in master mode, MOSI outputs data to the slave peripheral. When SPI is

in slave mode, MOSI receives data from the master controller.

XTALA1

Crystal A 1: Input to the inverting oscillator amplifier and input to the internal clock

generator circuits.

XTALA2

Crystal A 2: Output from the inverting oscillator amplifier

XTALB1

Crystal B 1: (Sub Clock) Input to the inverting oscillator amplifier and input to the inter-

nal clock generator circuits.

XTALB2

Crystal B 2: (Sub Clock) Output from the inverting oscillator amplifier

P2.0 - P2.7

24 - 31

18 - 25

I/O

Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that

have 1s written to them are pulled high by the internal pull-ups and can be used as

inputs. As inputs, Port 2 pins that are externally pulled low will source current because

of the internal pull-ups. Port 2 emits the high-order address byte during fetches from

external program memory and during accesses to external data memory that use 16-bit

addresses (MOVX @DPTR).In this application, it uses strong internal pull-ups emitting

1s. During accesses to external data memory that use 8-bit addresses (MOVX @Ri),

port 2 emits the contents of the P2 SFR. Some Port 2 pins receive the high order

address bits during EPROM programming and verification.

P3.0 - P3.7

11,

13 - 19

7 - 13

I/O

Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that

have 1s written to them are pulled high by the internal pull-ups and can be used as

inputs. As inputs, Port 3 pins that are externally pulled low will source current because

of the internal pull-ups. Port 3 also serves the special features of the 80C51 family, as

listed below.

RXD (P3.0): Serial input port

TXD (P3.1): Serial output port

INT0 (P3.2): External interrupt 0

INT1 (P3.3): External interrupt 1

T0 (P3.4): Timer 0 external input

T1 (P3.5): Timer 1 external input

WR (P3.6): External data memory write strobe

RD (P3.7): External data memory read strobe

PI2.0 - PI2.1

34, 12

28, 6

Port I2: Port I2 is an open drain. It can be used as inputs (must be polarized to Vcc

with external resistor to prevent any parasitic current consumption).

I/O

SCL (PI2.0): 2-wire Serial Clock

SCL output the serial clock to slave peripherals

SCL input the serial clock from master

I/O

SDA (PI2.1): 2-wire Serial Data

Table 13. Pin Description for 40/44 Pin Packages (Continued)

Mnemonic

Pin Number

Type

Name and Function

PLCC44

VQFP44 1.4

AT89C51IC2-SLSCM Datasheet(PDF) 12 Page - ATMEL Corporation

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