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AT89C51IC2-SLSCM Datasheet(PDF) 50 Page - ATMEL Corporation |
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AT89C51IC2-SLSCM Datasheet(HTML) 50 Page - ATMEL Corporation |
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50 / 146 page ![]() 50 AT89C51IC2 4301A–8051–01/04 Table 35. SADDR Register SADDR - Slave Address Register (A9h) Reset Value = 0000 0000b Not bit addressable Baud Rate Selection for UART for mode 1 and 3 The Baud Rate Generator for transmit and receive clocks can be selected separately via the T2CON and BDRCON registers. Figure 20. Baud Rate selection Table 36. Baud Rate Selection Table UART 765 43210 RCLK / 16 RBCK INT_BRG 0 1 TIMER1 0 1 0 1 TIMER2 INT_BRG TIMER1 TI MER2 TI MER_BRG_RX Rx Clock / 16 0 1 TIMER_BRG_TX Tx Clock TBCK TCLK TCLK (T2CON) RCLK (T2CON) TBCK (BDRCON) RBCK (BDRCON) Clock Source UART Tx Clock Source UART Rx 00 00 Timer 1 Timer 1 10 00 Timer 2 Timer 1 01 00 Timer 1 Timer 2 11 00 Timer 2 Timer 2 X 0 1 0 INT_BRG Timer 1 X 1 1 0 INT_BRG Timer 2 0 X 0 1 Timer 1 INT_BRG 1 X 0 1 Timer 2 INT_BRG X X 1 1 INT_BRG INT_BRG |
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