AT91SAM9263-CU datasheet(29/1029 Pages) ATMEL

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6249B–ATARM–14-Dec-06

AT91SAM9263 Preliminary

9.5

Power Management Controller

•Provides:

– the Processor Clock PCK

– the Master Clock MCK, in particular to the Matrix and the memory interfaces

– the USB Device Clock UDPCK

– the USB Host Clock UHPCK

– independent peripheral clocks, typically at the frequency of MCK

– four programmable clock outputs: PCK0 to PCK3

• Five flexible operating modes:

– Normal Mode with processor and peripherals running at a programmable frequency

– Idle Mode with processor stopped while waiting for an interrupt

– Slow Clock Mode with processor and peripherals running at low frequency

– Standby Mode, mix of Idle and Backup Mode, with peripherals running at low

frequency, processor stopped waiting for an interrupt

– Backup Mode with Main Power Supplies off, VDDBU powered by a battery

Figure 9-3.

AT91SAM9263 Power Management Controller Block Diagram

9.6

Periodic Interval Timer

• Includes a 20-bit Periodic Counter, with less than 1 µs accuracy

• Includes a 12-bit Interval Overlay Counter

• Real-time OS or Linux

®/WindowsCE® compliant tick generator

9.7

Watchdog Timer

• 16-bit key-protected Counter, programmable only once

MCK

periph_clk[..]

int

SLCK

MAINCK

PLLACK

Prescaler

/1,/2,/4,...,/64

PCK

Processor

Clock

Controller

Idle Mode

Master Clock Controller

Peripherals

Clock Controller

ON/OFF

USB Clock Controller

SLCK

MAINCK

PLLACK

Prescaler

/1,/2,/4,...,/64

Programmable Clock Controller

PLLBCK

Divider

/1,/2,/4

pck[..]

PLLBCK

UDPCK

Divider

/1,/2,/3,/4

ON/OFF

UHPCK

ON/OFF

AT91SAM9263-CU Datasheet(PDF) 29 Page - ATMEL Corporation

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