STM1404_08 datasheet(7/35 Pages) STMICROELECTRONICS

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STM1404

Description

7/36

Figure 1.

Logic diagram

VREF only for STM1404A; VTPU for STM1404B/C.

Normal mode: low when VOUT is internally switched to VCC and High when VOUT is internally switched to

battery.

SAL, RST, PFO, and BLD are open drain.

Note:

See Section 2: Pin descriptions on page 11 for details.

Table 2.

Signal names

Vccsw(1)

Normal mode: low when VOUT is internally switched to VCC and high when VOUT is internally switched to

battery.

VCC switch output

Manual (push-button) reset input

PFI

Power-fail input

TP1 - TP4

Independent physical tamper detect pins 1 through 4

VOUT

Supply voltage output

RST(2)

SAL, RST, PFO, and BLD are open drain.

Active-low reset output

PFO(2)

Power-fail output

SAL(2)

Security alarm output

BLD(2)

Battery low voltage detect

VREF

(3)

VREF only for STM1404A; VTPU for STM1404B/C.

1.237 V reference voltage

VTPU

(3)

Tamper pull-up (VCC or VBAT)

VBAT

Backup supply voltage

VCC

Supply voltage

VSS

Ground

AI09682a

VCC

VBAT

STM1404

VSS

VOUT

VREF

VTPU

(1)

VCCSW

(2)

SAL(3)

BLD(3)

PFI

TP1 (NH)

TP2

(NL)

TP3

(NH)

TP4

(NL)

PFO(3)

RST(3)

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